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Sr Principal SI/PI Engineer

Cadence Design Systems
August 22, 2026
Full-time
On-site
San Jose, California, United States
$154,000 - $286,000 USD yearly
Semiconductor IP Jobs, Level - Senior

Job Title

Sr Principal SI/PI Engineer

Role Summary

Hands-on senior engineer in the HPP IP R&D Group responsible for signal integrity (SI) and power integrity (PI) for advanced high-speed IP products. The role focuses on test-chip and board-level SI/PI optimization, providing channel models, verifying link performance, and supporting customers and internal ASIC teams.

Works closely with package/PCB designers, lab engineers, and customers to ensure IP performs reliably in target systems.

Experience Level

Senior β€” typically 3+ years of relevant experience; the role is at a senior/principal level.

Responsibilities

Key responsibilities include design, analysis, verification, and customer support for SI/PI of test chips, packages, and PCBs.

  • Perform SI/PI optimization and verification for test-chip package designs.
  • Optimize evaluation board designs for SI/PI performance.
  • Generate extracted and measured channel models for chip designers.
  • Develop and validate S-parameter channel models and IBIS-AMI behavioral models for link performance simulations.
  • Correlate simulation results with lab measurements; debug SI/PI-related issues in test chips and customer ASICs.
  • Provide package and PCB SI/PI design guidelines and review customer designs; offer feedback to improve IP performance.
  • Support customer inquiries and present technical findings to stakeholders.

Requirements

Must-have technical skills and experience.

  • 3+ years working with high-speed SerDes and PHYs.
  • Solid understanding of high-speed SerDes architecture.
  • Hands-on lab experience with high-speed oscilloscopes, TDRs, VNAs, spectrum analyzers, and similar instruments.
  • Proficiency with 3D/2.5D extraction tools such as Sigrity Clarity/PowerSI or Ansys HFSS/SIwave.
  • Experience with IBIS-AMI model simulations and link performance analysis.
  • Demonstrated ability to correlate simulation results to lab measurements and troubleshoot mismatches.
  • Knowledge of PCB and FCBGA design rules relevant to high-speed designs.
  • Strong debugging, problem-solving, communication, and presentation skills for internal and customer-facing discussions.

Education Requirements

M.S. or Ph.D. in Electrical Engineering or a related field (the posting specifies an MS or PhD in Electrical Engineering or similar degree).


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-08-21