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Sr Principal Electrical Engineer

Renesas
September 10, 2026
Full-time
On-site
San Jose, California, United States
Device Engineering Jobs, Level - Senior

Job Title

Sr Principal Electrical Engineer

Role Summary

Lead development of test vehicles supporting high-current BCD and low-voltage GaN process and product portfolios. Own test-vehicle definition, IC circuit and layout design, characterization planning, and silicon bring-up from concept through validation.

Work cross-functionally with process integration, product and applications engineering, reliability, and test teams to translate process capability targets into validated device and system-level demonstrations.

Experience Level

Senior - 10+ years of hands-on design experience in power semiconductor devices, analog/power ICs, or power electronics.

Responsibilities

Primary duties and scope of ownership.

  • Define and specify test vehicles for high-current BCD and low-voltage GaN technologies, including device test structures, scaled power stages, and demonstration circuits.
  • Translate process capability targets and product roadmap requirements into test-vehicle architecture and specifications.
  • Design and simulate power stage circuits (synchronous buck/boost, multiphase, half-bridge/DrMOS, gate drivers) to validate device performance under realistic switching and thermal conditions.
  • Select and characterize power devices (LDMOS, trench MOSFETs, LV GaN HEMTs, Schottky/sync rectifiers) and define layout-dependent tradeoffs.
  • Perform IC-level, parasitic-aware layout for high-current switching nodes, current sensing, and gate drive paths.
  • Extend designs to module/package and board level as needed; co-design with packaging, magnetics, and PCB layout for evaluation boards and system-level test vehicles.
  • Develop test and characterization plans for DC parametrics, switching performance, efficiency, transient response, and stress margins.
  • Lead or support silicon bring-up, debug, and correlation of measured results to simulation and design targets.
  • Document design methodology and characterization data to support technology qualification and product decisions.

Requirements

Must-have technical skills and experience.

  • 10+ years of hands-on design experience in power semiconductor devices, analog/power ICs, or power electronics.
  • Strong working knowledge of power conversion topologies (buck, boost, multiphase/interleaved, half-bridge, DrMOS) and their impact on device requirements.
  • Solid understanding of power device physics and tradeoffs across BCD and low-voltage GaN technologies (RDS(ON), Qg, switching loss, breakdown/avalanche, thermal behavior).
  • Demonstrated experience designing test structures or test chips/vehicles for process technology development.
  • IC-level design and parasitic-sensitive layout experience for high-current switching nodes.
  • Experience with module/package/board-level co-design, evaluation board layout, and thermal/electrical integration.
  • Proficiency with circuit simulation tools (SPICE or equivalent) and familiarity with device/TCAD simulation concepts.
  • Ability to specify absolute maximum ratings and protection thresholds (OVP/UVP/OCP/OTP) relevant to power-stage reliability.
  • Strong lab skills for bring-up, debug, and characterization using oscilloscopes, curve tracers, power analyzers, and thermal imaging.
  • Effective cross-functional communication and documentation skills.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Microelectronics, or a related technical field (as stated). No alternative-equivalent language was provided.


About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

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Date Posted: 2026-08-31