Cadence Design Systems logo

Sr Principal Design Engineer

Cadence Design Systems
August 04, 2026
Full-time
On-site
Shanghai, China
EDA Jobs, Level - Senior

Job Title

Sr Principal Design Engineer

Role Summary

Join the Palladium and Protium solution team to design and implement low-level device drivers and GUI-based tools that support system configuration, validation, and real-time debugging at the hardware-software boundary.

You will collaborate closely with hardware engineers to enable high-speed interfaces and memory protocols, improve system bring-up, and support customers with robust software and tooling.

Experience Level

Senior β€” requires significant experience; source specifies 10+ years of industry experience.

Responsibilities

Primary responsibilities include driver development, tooling, integration, and validation across software and hardware domains.

  • Design, develop, and optimize device drivers for high-speed hardware interfaces (e.g., PCIe, CXL) on Linux and/or Windows.
  • Architect, build, and maintain GUI-based tools for device configuration, telemetry, validation, and debugging.
  • Work with hardware teams to analyze register maps, implement communication protocols, and translate system requirements into software.
  • Implement low-level features: device enumeration, configuration handling, interrupt processing, DMA, and hardware-to-GUI control loops.
  • Create automation frameworks and test utilities to accelerate hardware bring-up and regression testing.
  • Perform root-cause analysis and resolve complex issues spanning hardware and software stacks.
  • Collaborate with engineering and customer enablement teams to support product bring-up and field issue resolution.

Requirements

Must-have technical skills and experience; preferred items listed separately.

  • Strong, production-grade programming skills in C/C++.
  • Hands-on experience developing device drivers on Linux and/or Windows.
  • Foundational understanding of high-speed protocols such as PCIe and Ethernet.
  • Proven debugging skills for complex system integration issues across hardware and software.

Education Requirements

BS degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field. The posting specifies 10+ years of industry experience.

Preferred Qualifications

Nice-to-have skills that strengthen candidacy.

  • Experience in multi-language environments (SystemVerilog, C/C++, Python).
  • Experience with GUI frameworks such as Qt or PyQt.
  • Proficiency in Python for test automation and rapid prototyping.
  • Deep Linux kernel driver development and memory management experience.
  • Familiarity with user-mode hardware access methods (VFIO, UIO, PCIe BAR mapping).
  • Experience with hardware debug tools: protocol analyzers, logic analyzers, oscilloscopes.
  • Exposure to applying AI/ML techniques to verification, log analysis, or tooling automation.
  • Strong analytical problem-solving and ability to drive projects independently.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

Cadence Design Systems logo

Date Posted: 2026-08-01