Sr Principal CAD & HPC Workflow

Job Title

Sr Principal CAD & HPC Workflow

Role Summary

Senior principal CAD engineer responsible for architecting and modernizing CAD software, HPC compute, and engineering automation used by Micron's global memory design teams (DRAM, HBM, NAND, custom memory).

Drive measurable improvements by defining metrics and customer-facing service levels, and advance AI-enabled and agentic CAD workflows in collaboration with CAD, Design Engineering, HPC, and EDA vendors.

Experience Level

Senior - requires extensive experience (see Requirements). The posting specifies 15+ years in semiconductor CAD/EDA/engineering infrastructure or software development and 5+ years of engineering management.

Responsibilities

Accountable for platform architecture, operational metrics, cross-team technical leadership, and scaling compute and workflows for global design teams.

• Partner with CAD Software and HPC teams to support worldwide memory design organizations.
• Define and implement improvement and quality metrics (job throughput, turnaround time, success rates) and expose them as customer-facing service levels.
• Build dashboards and reporting to track environment and workflow performance and enable continuous improvement.
• Design and modernize CAD software architecture, web services, repository workflows (Git/Bitbucket), Jenkins automation, and CI/CD for project setup and environment management.
• Collaborate on HPC compute, LSF job management, storage systems, and scalable compute infrastructure.
• Advance automated quality gating, PERC/ERC methodology, and design-environment standardization across product lines.
• Engage with EDA vendors (Cadence, Synopsys, Siemens) on infrastructure strategy and technical integrations.
• Lead AI-enabled engineering productivity and agentic CAD workflow initiatives and deliver internal software solutions for Design Automation.
• Mentor engineers and influence technical direction across CAD, Design Engineering, HPC, and IT.

Requirements

Clear must-have qualifications followed by preferred skills and technologies.

Minimum required:

• 15+ years of experience in semiconductor CAD, EDA, engineering infrastructure, or software development.
• 5+ years of engineering management experience leading technical teams.
• Proven hands-on knowledge of design infrastructure, revision control systems, software development practices, and engineering workflow automation.
• Experience driving cross-functional initiatives across design, CAD, IT, HPC, and vendor organizations.

Preferred:

• Familiarity with Perforce, IPLM/Methodics, Jenkins, Git, Bitbucket, and enterprise software platforms.
• Experience supporting LSF, HPC, cloud, storage, and compute infrastructure for semiconductor design environments.
• Experience with Cadence, Synopsys, and Siemens EDA ecosystems.
• Experience leading AI, agentic software, or engineering productivity initiatives.

Education Requirements

B.S. in Electrical Engineering, Computer Engineering, Computer Science, or a related field (listed as a minimum qualification).

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.