Sr. Physical Design Engineer, Annapurna Labs

Job Title

Sr. Physical Design Engineer, Annapurna Labs

Role Summary

Design and optimize ASIC physical implementation for custom SoCs used in AWS machine learning servers. Work across block and subsystem levels from RTL-to-GDSII to achieve power, performance, area, and quality-of-results targets.

Collaborate with RTL/architecture teams to perform feasibility studies, implement physical design flows, drive sign-off activities, and develop physical design methodologies for production datacenter chips.

Experience Level

Senior — typically requires 6+ years of relevant ASIC physical design experience.

Responsibilities

Core responsibilities include:

• Collaborate with RTL and logic designers to assess architectural feasibility and PPA trade-offs.
• Lead block and subsystem physical implementation: synthesis, floorplanning, pin/bus planning, placement and routing.
• Design and optimize power and clock distribution networks; perform congestion, timing closure, and IR drop analysis.
• Execute physical verification, ECOs, and sign-off for production tapes.
• Develop and improve physical design methodologies and automation flows.
• Evaluate third-party IP and drive IP integration and physical requirements.
• Work collaboratively in a fast-paced team, mentoring and coordinating with other engineers and cross-functional teams.

Requirements

Must-have technical skills and experience:

• 6+ years of ASIC physical design experience executing RTL-to-GDSII flows in advanced nodes (examples in posting: 7nm, 14/16nm, 20nm, 28nm).
• Practical experience with synthesis, equivalency verification, floorplanning, place-and-route, timing closure, IR drop analysis, physical verification, and ECO flows using commercial EDA tools.
• Deep understanding of sign-off activities (timing, IR/em, physical verification).
• Scripting experience with Python, Perl, Bash, or PowerShell for automation and flow development.

Nice-to-have / preferred:

• Experience mentoring, leading, or managing junior engineers.
• Expertise developing CAD/EDA flows and tool automation (Cadence, Mentor, Synopsys, or similar).
• Experience integrating IP, specifying physical-IP requirements, and driving IP delivery (4+ years preferred).
• Familiarity with device physics, custom/semi-custom implementation techniques, and subsystem interfaces such as DDR and PCIe.
• Experience extracting design parameters, QOR metrics, and trend analysis for manufacturing and performance optimization.

Education Requirements

Required: Bachelor's degree in Electrical Engineering or Computer Science with ~8+ years of experience, or Master's degree in Electrical Engineering or Computer Science with ~6+ years of experience (as listed in the source). Equivalent practical experience in relevant ASIC physical design may be considered.

About the Company

Company: Amazon Web Services

Headquarters: Seattle, Washington, USA

Amazon Web Services (AWS) provides a comprehensive and evolving cloud computing platform that includes infrastructure as a service (IaaS), platform as a service (PaaS), and software as a service (SaaS). AWS allows business and developers to use a wide range of cloud services for computing power, storage, and content delivery, among others, thus fostering innovation and enabling faster deployment of applications. AWS is designed to be scalable, flexible, and cost-effective across industries worldwide.