Job Title
Senior Engineer, Physical Design
Role Summary
Senior Physical Design Engineer responsible for RTL-to-GDS implementation of next-generation IP blocks. Work across synthesis, floorplanning, place & route, and signoff to meet aggressive power, performance, and area (PPA) targets.
Collaborate with microarchitecture and RTL teams to identify and resolve physical bottlenecks; contribute to flows, methodology, and automation while mentoring junior engineers. Role located in Bengaluru, India.
Experience Level
Senior β the posting requests 4+ years of hands-on physical design experience; role expects substantial independent ownership of complex implementation tasks.
Responsibilities
Primary responsibilities include end-to-end physical implementation and cross-functional co-design.
- Execute full physical design flow: synthesis, floorplanning, placement & routing, and signoff for major subsystems and IP blocks.
- Partner with RTL and architecture teams from early design through signoff to identify and resolve physical and structural bottlenecks (timing, congestion, power hotspots, interconnect limits).
- Apply advanced PPA techniques tailored to different IP classes (low-leakage edge IPs, automotive-reliability designs, high-bandwidth fabrics).
- Drive technical ownership of complex implementation issues, improve flows and automation, and mentor junior engineers.
Requirements
Must-have technical skills and experience.
- 4+ years of hands-on physical design experience; experience on advanced process nodes preferred.
- Proven physical implementation experience for at least one major IP domain (CPU, interconnect/fabrics, cache/memory hierarchies, or accelerators).
- Strong proficiency with industry EDA tools (Synopsys Fusion Compiler / PrimeTime and/or Cadence Innovus / Tempus for implementation and sign-off).
- Solid debugging skills for structural timing violations, routing congestion, and other physical-design challenges with minimal supervision.
- Co-design mindset: ability to reason about the interaction between microarchitecture, RTL, and physical layout.
- Must be able to provide satisfactory background and reference checks and proof of right to work in India.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.
About the Company
Company: SiFive
Headquarters: San Mateo, California, United States
SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.

Date Posted: 2026-07-17