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Sr. ASIC Design Engineer (Starshield)

SpaceX
July 29, 2026
Full-time
On-site
Hawthorne, California, United States
$160,000 - $225,000 USD yearly
RTL Design Jobs, Level - Senior

Job Title

Sr. ASIC Design Engineer (Starshield)

Role Summary

Join the Starshield team to design next-generation ASICs and FPGAs for space and ground systems that support national-security missions. You will develop RTL, collaborate with verification and physical implementation teams, and participate in silicon bring-up and lab validation.

Experience Level

Senior role. Typical guidance: 5+ years of experience in RTL implementation and/or FPGA/ASIC development.

Responsibilities

Design, deliver, and validate digital ASIC/FPGA subsystems from micro-architecture through silicon bring-up.

  • Define micro-architecture and implement RTL in Verilog/SystemVerilog; integrate into top-level designs.
  • Develop and apply timing constraints; support synthesis, STA, timing closure, and formality checks.
  • Collaborate with verification teams to achieve fully verified, synthesis- and timing-clean designs.
  • Evaluate architectural trade-offs and derive subsystem specifications working with modem/DSP and RFIC engineers.
  • Support silicon bring-up, lab validation, and development of automated test equipment for measurements.

Requirements

Key requirements and preferred skills for successful candidates.

  • Must-have: 5+ years of experience in RTL implementation and/or FPGA/ASIC development.
  • Must-have: Proficiency in Verilog/SystemVerilog for RTL design and integration.
  • Must-have: Hands-on experience with synthesis, static timing analysis (STA), timing constraints, and timing closure.
  • Must-have: Experience working with verification teams and common EDA flows (HDL simulation, lint, synthesis tools).
  • Must-have: Willingness to work long hours when necessary and to travel for off-site testing.
  • Must-have: ITAR eligibility: U.S. citizen, U.S. lawful permanent resident, refugee, asylee, or eligible for required U.S. Department of State authorizations.
  • Nice-to-have: Clock domain crossing solutions, power optimization, multicore CPU subsystem design, AXI/AHB or other bus protocol experience, embedded processors, high-speed/low-power techniques, scripting (Python, TCL), familiarity with FPGA tools (Vivado, Quartus) and simulators (VCS, Questa, IES).

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science.


About the Company

Company: SpaceX

Headquarters: Hawthorne, California, United States

SpaceX is focused on developing space technologies to enable human exploration of Mars and beyond. The company is known for its advancements in rocketry and its Starlink satellite constellation, which delivers high-speed internet globally.

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Date Posted: 2026-07-23