Sr Application Engineer

Job Title

Sr Application Engineer

Role Summary

Provide technical leadership in pre-sales and post-sales engagements for signoff parasitic extraction and EMIR/power integrity solutions. Work with sales, R&D, and field teams to run evaluations, demonstrations, and proofs-of-concept that validate product accuracy, performance, and value for customer designs.

Experience Level

Senior-level. Specific years of experience not specified in the posting.

Responsibilities

Lead and support customer-facing technical activities to drive product adoption and design wins.

• Drive customer adoption of Quantus and Voltus‑Fi signoff and EMIR solutions via guided pre-sales and post-sales engagements.
• Plan and execute customer benchmarks and evaluations to demonstrate product accuracy and performance.
• Develop and deliver technical demonstrations, presentations, and proofs-of-concept.
• Collaborate with sales management, account teams, and customers to understand technical requirements and support opportunities.
• Contribute to technical sales execution plans and communicate progress and findings to peers and management.
• Provide pre-sales technical support during customer meetings and evaluations to help secure design wins.

Requirements

Must-have technical skills and capabilities, followed by preferred skills.

• Practical knowledge of VLSI/physical design and signoff flows (parasitic extraction, EMIR, timing, or physical verification concepts) from coursework, internships, or hands-on work.
• Basic understanding of IC layout, netlists, LVS, and signoff methodologies.
• Familiarity with Linux/UNIX environments and typical EDA tool workflows.
• Ability to run benchmarks, analyze results, and debug technical issues with guidance.
• Strong analytical and problem-solving skills; clear written and verbal communication for customer interactions.
• Ability to work effectively in a team-oriented, fast-paced environment and collaborate with sales, R&D, and field teams.

Preferred (nice-to-have):

• Exposure to Cadence tools such as Quantus, Voltus‑Fi, Virtuoso, Pegasus, or Spectre through projects or internships.
• Experience or coursework in advanced semiconductor technologies, power integrity, or signal integrity.
• Hands-on internship or project experience with EDA tools, semiconductor design flows, or foundry PDKs.
• Basic scripting skills (Tcl, Python, or shell) for flow automation or analysis.
• Demonstrated interest in technical customer engagement, demos, and product enablement.

Education Requirements

Master's degree in Electrical Engineering, Computer Engineering, or a related technical discipline is required. The posting also references academic coursework or internship experience in VLSI design, physical design, or signoff flows (parasitic extraction, EMIR, timing, or physical verification concepts).

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.