Sr. Analog Design Engineer

Job Title

Sr. Analog Design Engineer

Role Summary

Senior analog IC designer responsible for architecting and implementing high-voltage analog multiplexers, low-noise amplifiers, and power management IP for ultrasound and related applications. Position works across product definition, circuit design, verification, layout guidance, and tape-out activities within a multi-disciplinary team.

Primary focus is transistor-level analog design, verification (pre- and post-layout), and mentoring junior engineers to deliver production-ready IP.

Experience Level

Senior level; posting requests 10+ years of analog IC design experience.

Responsibilities

The role includes architecture, detailed design, verification, and release activities for analog IP; collaboration with cross-functional teams and mentoring junior staff.

• Design and develop high-voltage analog MUX circuits for ultrasound transducer arrays (HV SOI technology).
• Architect and implement low-noise amplifiers optimized for ultrasound applications.
• Design analog building blocks: LDOs, charge pumps, bandgaps, amplifiers, drivers, DACs, current sensing, and other precision circuits.
• Develop PMIC-related analog circuits and subsystems.
• Participate in full product development cycle: product definition, trade-offs, risk/cost/performance analysis, and product introduction.
• Plan and execute Design-For-Test strategy and test plans to evaluate block performance.
• Conduct design reviews, manage tape-out schedules, and coordinate pre- and post-tape-out evaluations.
• Provide layout guidance, review post-layout results, and close loop with simulations and silicon measurements.
• Perform block verification: PVT characterization, Monte Carlo analysis, top-level AMS simulations, and post-layout extraction/simulations.
• Supervise and train junior engineers to ensure successful design execution.

Requirements

Must-have technical skills and experience for successful performance in this role.

• 10+ years of experience in analog IC design, with hands-on transistor-level implementation.
• Deep experience with high-voltage analog multiplexers and low-noise amplifier design.
• Experience designing PMIC circuits and related analog blocks.
• Strong simulation and modeling skills in the Cadence environment (schematic, layout extraction, SPICE-level simulation).
• Solid understanding of BiCMOS and high-voltage BCD process technologies, including reliability and ESD/latch-up considerations.
• Proven knowledge of low-power analog design techniques and control loop topologies (e.g., Constant On Time, current-mode and voltage-mode control).
• Experience with verification flows: PVT, Monte Carlo, AMS/top-level simulations, and post-layout verification.
• Hands-on measurement and lab experience for silicon debug and characterization.
• Demonstrated ability to lead design reviews, manage tape-out schedules, and mentor junior engineers.

Education Requirements

Requires PhD or M.S. in Electrical Engineering (PhD/MSEE) or equivalent; equivalent practical experience acceptable.

About the Company

Company: Monolithic Power Systems

Headquarters: San Jose, California, USA

Monolithic Power Systems, Inc. (MPS) is a leading provider of energy-efficient power solutions for various applications, including industrial, telecom, automotive, and consumer sectors. Known for their cutting-edge integrated power semiconductors, MPS emphasizes innovation, sustainability, and creativity, making them one of the fastest-growing companies in the semiconductor industry.