Job Title
Space Systems FPGA & VLSI Engineer
Role Summary
Design-focused RTL/FPGA engineer on a space systems team building hardware for a LEO satellite communications system. Responsible for developing SystemVerilog RTL, validating FPGA platforms, and delivering timing-safe, high-performance designs across FPGA and ASIC flows.
Work closely with verification, ASIC, and software teams to integrate and validate flight or flight-like hardware.
Experience Level
Mid-level (Level - Mid-Career). Typical experience: 3β7 years in RTL/FPGA design or equivalent engineering experience.
Responsibilities
Primary responsibilities include:
- Write and maintain SystemVerilog RTL for FPGA and ASIC implementations.
- Implement, synthesize, and validate FPGA designs and platforms.
- Perform timing analysis and collaborate on timing closure to ensure timing-safe hardware.
- Collaborate with verification, ASIC, and software teams for integration and validation.
- Debug hardware and FPGA firmware on development boards and system-level tests.
Requirements
Must-have and preferred skills:
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Must-have: Strong experience writing SystemVerilog RTL and developing FPGA designs.
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Must-have: Hands-on experience with FPGA implementation, synthesis, and validation flows.
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Must-have: Experience with timing analysis and working toward timing-closed designs.
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Must-have: Proven ability to work cross-functionally with verification, ASIC, and software teams.
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Nice-to-have: Experience in space, satellite, or other high-reliability embedded systems.
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Nice-to-have: Familiarity with ASIC design flows or mixed FPGA/ASIC development.
Education Requirements
Not specified.
About the Company
Company: Hire'in Solutions
Technical staffing and recruiting firm specializing in placing engineers and IT contractors for contract and W2 roles.

Date Posted: 2026-08-01