Job Title
Space FPGA Engineer — RTL/Verilog, High-Throughput
Role Summary
Design and test RTL for FPGA-based systems used in Astranis products. The engineer will implement, verify, and optimize high-throughput FPGA designs and work across software, DSP, and hardware teams to meet system requirements.
Competitive compensation includes base pay and equity.
Experience Level
Entry-level — expects approximately 2+ years of FPGA experience.
Responsibilities
Main responsibilities include:
- Develop RTL in Verilog/SystemVerilog for FPGA implementations.
- Create and run verification tests and testbenches to validate RTL behavior.
- Collaborate with software, DSP, and hardware teams to satisfy system-level requirements and integration targets.
- Optimize designs for throughput, timing closure, and resource efficiency.
- Support hardware bring-up, debugging, and performance validation on FPGA platforms.
- Document design decisions, verification results, and test procedures.
Requirements
Must-have and preferred qualifications:
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Must-have: At least 2 years of FPGA engineering experience.
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Must-have: Proficiency in Verilog/SystemVerilog and RTL design methodologies.
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Must-have: Experience writing and executing FPGA verification and test plans.
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Must-have: Strong collaboration and communication skills across cross-functional teams.
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Nice-to-have: Experience with DSP algorithms or high-throughput data-path design.
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Nice-to-have: Familiarity with FPGA toolchains (synthesis, place-and-route, timing analysis) and hardware bring-up.
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Nice-to-have: Prior experience in aerospace or space-qualified hardware development.
Education Requirements
Not specified.
About the Company
Company: Astranis
Headquarters: San Francisco, CA, USA
Astranis designs, builds, and operates small geostationary satellites and satellite communications networks, providing secure, customizable connectivity to commercial, government, and military customers. The company handles end-to-end satellite development, manufacturing, and operations and has raised substantial venture funding to support launches and commercial deployments.

Date Posted: 2026-06-24