Software R&D Engineer, VLSI Physical Design - New College Grad 2026
NVIDIAJob Title
Software R&D Engineer, VLSI Physical Design - New College Grad 2026
Role Summary
Join an internal EDA/physical-design software team developing high-performance tools that improve chip frequency and power for advanced AI hardware. You will design and implement algorithms, primarily in C++, that target gate-level sizing, buffering, clock-tree synthesis interactions, legalization, and ECO flows.
This role works cross-functionally with design teams to prototype, validate, and deploy optimization engines that fuse multiple physical-design steps for improved PPA.
Experience Level
Entry-level — New college graduate (Class of 2026). Suitable for candidates at the start of their professional career.
Responsibilities
Primary responsibilities include research, implementation, and integration of VLSI physical-design algorithms.
- Invent and implement optimization engines that combine multiple physical-design steps (e.g., co-optimization of legalization and sizing).
- Design and improve algorithms (C++) for gate-level sizing, buffering, useful clock skew, cell legalization, power minimization, ECO routing, and incremental parasitic extraction.
- Profile and optimize high-performance software (multithreading, memory and I/O efficiency) to meet design throughput requirements.
- Collaborate directly with chip design teams to validate algorithms on real designs and facilitate deployment into production flows.
- Maintain and extend tool integrations with existing implementation flows and signoff tools.
Requirements
Must-have technical skills and relevant experience.
- Experience developing VLSI physical-design algorithms and software in C++.
- Knowledge of timing optimization concepts: cell libraries, interconnect models, crosstalk, glitches, IR drop, timing constraints, corners, and congestion.
- Familiarity with physical-design and signoff tools (examples: ICC2, Innovus, PrimeTime, Tempus, StarRC) and design flows scripted in Perl, Tcl, or Python.
- Ability to write production-quality, high-performance C++ code and reason about multithreading and memory use.
- Strong problem-solving skills and the ability to collaborate with chip-design teams to deliver usable tool features.
Nice-to-have:
- Modern C++ (C++14+) idioms, concurrency experience, and lambda usage.
- Experience with distributed computing, performance tuning, or low-level I/O optimization.
- Familiarity with machine learning approaches applied to EDA, such as reinforcement learning or graph neural networks.
Education Requirements
Master's or PhD in Electrical Engineering or Computer Science, or equivalent practical experience in VLSI physical design or related software development.
About the Company
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
