Software R&D Engineer, VLSI Physical Design - New College Grad 2026
NVIDIAJob Title
Software R&D Engineer, VLSI Physical Design — New College Grad (2026)
Role Summary
Develop high-performance internal EDA software that advances VLSI physical design. Work on optimization engines that improve chip frequency and power across placement, sizing, buffering, clock tree synthesis, legalization, and routing.
Join an R&D team that combines parallel computing, machine learning, and specialized algorithms to deliver tools used directly by chip design teams from invention through deployment.
Experience Level
Entry-level — new college graduate (Class of 2026). Applicable for early-career candidates; postgraduate or equivalent practical experience noted in the posting.
Responsibilities
Contribute to algorithm and software development for physical-design optimization and lead integration with design flows.
- Invent and implement optimization engines that co-optimize steps (e.g., legalization with sizing) to improve PPA.
- Design, implement, and optimize C++ algorithms for gate-level sizing, buffering, useful clock skew, cell legalization, power minimization, ECO routing, and incremental parasitic extraction.
- Profile and tune software for high throughput: multithreading, memory and I/O efficiency, and distributed execution when required.
- Integrate tools into existing design flows and work directly with design teams to validate and deploy solutions.
- Automate and script flows using Perl, Tcl, and Python as needed for tool integration and testing.
Requirements
Key technical skills and experience required or strongly preferred.
Must-have
- Proven experience developing VLSI algorithms in C++.
- Practical understanding of VLSI timing optimization and related concepts: cell libraries, interconnect models, crosstalk, glitches, IR drop, timing constraints, corners, and congestion.
- Familiarity with implementation and signoff tools such as ICC2, Innovus, PrimeTime, Tempus, and StarRC; plus scripting in Perl, Tcl, or Python for design flows.
Nice-to-have
- Experience with modern C++ (C++14+) features, concurrency, and lambdas.
- Background in high-performance software design: multithreading, distributed systems, and efficient memory/I/O use.
- Experience applying machine learning (reinforcement learning, GNNs) to physical design problems.
- Familiarity with co-optimizing multiple physical-design stages for improved PPA.
Education Requirements
Posting specifies a Master’s or PhD in Electrical Engineering or Computer Science (or equivalent practical experience). The role is also listed for new college graduates (Class of 2026).
About the Company
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
