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Software R&D Engineer β€” VLSI Physical Design (New College Grad 2026)

NVIDIA
August 04, 2026
Full-time
On-site
California, US
EDA Jobs, Level - Entry or Early Career

Job Title

Software R&D Engineer β€” VLSI Physical Design (New College Grad 2026)

Role Summary

Join a software team that builds high-performance internal EDA tools used to implement advanced AI hardware. The role focuses on research and development of VLSI physical-design optimization engines and algorithms to improve performance, power, and area (PPA).

The team works across algorithm invention, C++ implementation, and direct collaboration with chip design teams to deploy improvements into production flows.

Experience Level

Entry-level / New college graduate (targeting 2026 new grads). Suitable for candidates with internship or research experience in VLSI physical-design algorithms or equivalent practical experience.

Responsibilities

Contribute to algorithm design and implementation for VLSI physical design optimization and work with design teams to integrate and validate solutions.

  • Invent and develop optimization engines that combine multiple physical-design steps (e.g., co-optimization of legalization and sizing) to improve chip frequency and reduce power.
  • Design and implement C++ algorithms for gate-level sizing, buffering, useful clock skew, cell legalization, power minimization, ECO routing, and incremental parasitic extraction.
  • Profile and optimize software for high performance: multithreading, memory and I/O efficiency, and distributed execution where applicable.
  • Collaborate with chip design teams to validate algorithms on real designs and drive deployment into internal toolchains.
  • Iterate on algorithms using data-driven methods and integrate ML techniques where beneficial.

Requirements

Core technical skills and domain knowledge required or strongly preferred.

  • Experience developing VLSI physical-design algorithms in C++.
  • Solid understanding of timing optimization and related concepts: cell libraries, interconnect models, crosstalk, glitches, IR drop, timing constraints, corners, and congestion.
  • Familiarity with industry implementation and signoff tools and flows (examples: ICC2, Innovus, PrimeTime, Tempus, StarRC) and scripting in Perl, Tcl, or Python.
  • Practical skills in high-performance software design: multithreading, concurrency, and efficient memory/I/O use.
  • Strong problem-solving ability and drive to improve PPA through continuous refinement.

Nice-to-have:

  • Experience with modern C++ (C++14 or newer), lambdas, and concurrency patterns.
  • Experience applying ML (reinforcement learning, GNNs) to physical-design problems.
  • Prior internship or project experience on advanced process-node designs or ML-assisted EDA tools.

Education Requirements

Master's or PhD in Electrical Engineering or Computer Science, or equivalent practical experience.


About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.

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Date Posted: 2026-08-04