Software R&D Engineer, RTL Optimization Tools

Job Title

Software R&D Engineer, RTL Optimization Tools

Role Summary

Develop C++ CAD/EDA tools for large-scale RTL quality, timing, and power optimization using graph algorithms, machine learning, and SOC integration knowledge. Work spans research, algorithm design, implementation, and direct collaboration with RTL design teams to deploy optimizations into production designs.

Experience Level

Mid-level — typically requires 3+ years of relevant CAD software and VLSI hardware design experience.

Responsibilities

Key responsibilities include invention, implementation, and deployment of RTL optimization technologies:

• Design and implement parallel, graph-based RTL traversal, analysis, and manipulation methods.
• Analyze the impact of RTL changes on datapath latency, power, DFT, clocking, and power delivery.
• Research and prototype ML-driven approaches (LLMs, GNNs, GANs, reinforcement learning) to suggest or perform RTL modifications.
• Develop high-performance algorithms for clustering, min-cost tree covering (technology mapping), datapath implementation, and logic synthesis tasks.
• Work end-to-end from discovery and invention to working directly with design teams for deployment.
• Write efficient, maintainable C++ code suitable for multithreading and high-performance execution.

Requirements

Must-have qualifications and technical skills; followed by concise nice-to-have items.

• 3+ years of relevant experience in CAD software and VLSI hardware design.
• Strong C++ software development skills, with emphasis on algorithm development for graph traversal, pattern matching, and optimization.
• Familiarity with RTL design (Verilog/SystemVerilog) and system-level hardware concerns such as scan insertion, MBIST, clock and power distribution, and bus architectures.
• Knowledge of EDA techniques including logic synthesis, global routing concepts, static timing analysis, and SAT solvers.
• Strong communication and interpersonal skills for cross-team collaboration.

• Nice-to-have: experience with Verific, Espresso, logic rewriting, tree coverage, and combinatorial optimization tools.
• Nice-to-have: experience building high-performance software (multithreading, distributed computing, efficient memory and I/O).
• Nice-to-have: prior roles combining software and hardware responsibilities, especially SOC/IP integration or RTL design.
• Nice-to-have: experience applying machine learning techniques for analysis, optimization, or code generation.

Education Requirements

MS or PhD in Electrical Engineering or Computer Science, or equivalent practical experience (explicitly stated as acceptable).

About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.