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Software R&D Engineer, Digital Logic Synthesis - New College Grad 2026

NVIDIA
May 17, 2026
Full-time
On-site
Santa Clara, California, United States
$116,000 - $218,500 USD yearly
EDA Jobs, Level - Entry or Early Career

Job Title

Software R&D Engineer, Digital Logic Synthesis - New College Grad 2026

Role Summary

Develop algorithms and production software for RTL synthesis and digital logic optimization used in NVIDIA's internal EDA toolchain. The role spans research, prototyping, and integration with RTL and physical design teams to improve timing, power, and area for advanced GPU/AI designs.

Work as part of an EDA Software R&D team to take inventions from prototype to deployed tooling across the design flow.

Experience Level

Entry-level (new college graduate).

Responsibilities

Primary responsibilities include researching, prototyping, and implementing logic synthesis and optimization techniques and delivering production-quality tools.

  • Invent and implement algorithms for RTL synthesis, logic optimization, graph-based traversal, and technology mapping.
  • Develop physical-aware synthesis techniques using placement, congestion, and timing feedback to improve PPA.
  • Analyze RTL change impact on timing, power, area and effects on DFT, clocking, and power delivery.
  • Prototype and evaluate ML methods (GNNs, reinforcement learning, other models) to guide optimization decisions and integrate successful approaches into production.
  • Design high-performance algorithms for clustering, min-cost tree covering, datapath implementation, and efficient multithreaded execution.
  • Collaborate with RTL and physical design teams to deploy tools and own end-to-end delivery from research to production rollout.

Requirements

Must-have technical skills and experience:

  • Experience with EDA software or VLSI flows focused on logic synthesis or digital optimization.
  • Strong computer science fundamentals and modern C++ (templates, STL, concurrency libraries, profiling, data structures, algorithms, testing).
  • Solid understanding of RTL (Verilog/SystemVerilog) and digital design concepts including timing, clocking, DFT basics, and power intent.
  • Familiarity with EDA techniques such as logic synthesis, routing/global route, static timing analysis, power/area optimization, and SAT solvers.

Nice-to-have:

  • Prior experience with RTL logic synthesis toolchains and components (e.g., Verific, Espresso, SAT solvers, logic rewriting).
  • Experience in high-performance software: multithreading, distributed computing, and efficient memory/I/O use.
  • Experience applying machine learning techniques to systems or EDA problems.

Education Requirements

MS or PhD in Electrical Engineering or Computer Science preferred; equivalent practical experience accepted.


About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.

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Date Posted: 2026-05-16