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Software Engineer II β€” PCIe VIP R&D

Cadence Design Systems
May 13, 2026
Full-time
On-site
Belo Horizonte, State of Minas Gerais, Brazil
Semiconductor IP Jobs, Level - Mid-Career

Job Title

Software Engineer II β€” PCIe VIP R&D

Role Summary

Develop and validate PCIe Verification IP (VIP) software as part of the VIPPCIE R&D team in the SVG group. Work includes C/C++ implementation, validation, debugging, and producing reusable software to meet protocol specifications and customer use models.

Cadence provides EDA tools and IP for semiconductor and system design.

Experience Level

Mid-level (Software Engineer II). No specific years-of-experience stated; expects demonstrated proficiency in C/C++ software development and advanced debugging.

Responsibilities

Primary duties include software development, validation, and collaboration across distributed teams.

  • Design, implement, and validate C/C++ software for PCIe Verification IP.
  • Develop reusable, robust software aligned with protocol specifications and customer use models.
  • Apply software development best practices and perform validation and advanced debugging on a large codebase.
  • Collaborate with multi-site, cross-functional teams; contribute to technical roadmaps and milestones.
  • Support training and knowledge transfer within the team.

Requirements

Must-have technical skills and competencies.

  • Proficiency in C/C++ with strong object-oriented design, algorithms, and data structures knowledge.
  • Experience with complexity analysis, graph algorithms, and advanced debugging techniques.
  • Strong analytical and problem-solving skills; ability to visualize processes and outcomes.
  • Excellent communication skills and ability to work collaboratively in a multi-location environment.
  • Fluency in English and Portuguese.
  • Employment: full-time, 40 hours/week (CLT) based in Belo Horizonte, Brazil.

Nice-to-have:

  • Knowledge of PCI Express (PCIe) or other protocols such as USB, NVMe, SATA, DisplayPort.
  • Familiarity with Verilog/SystemVerilog and OVM/UVM verification methodologies.
  • Experience with digital logic design or IP/SoC verification flows.
  • Understanding of EDA tool flows and customer-oriented support.

Education Requirements

Complete Bachelor's degree in Computer Science or a related technical field is specified as required.


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-05-13