Job Title
SoC Verification Technical Lead
Role Summary
Lead verification execution for customer SoC, subsystem, and IP projects from planning through signoff. Work directly with customer engineering teams and cross-functional Synopsys groups to deliver verification strategies, testbenches, and debug to ensure silicon meets requirements and ships on schedule.
Join the System Solutions Group (SSG), delivering end-to-end SoC design and verification services across automotive, HPC, aerospace, and defense customers.
Experience Level
Senior β requires substantial prior experience; the posting specifies 5+ years of hands-on SoC, subsystem, or IP verification experience.
Responsibilities
Lead technical and execution activities for customer verification engagements and mentor a small team of engineers.
- Lead verification execution from planning through signoff and define scope and deliverables with customers.
- Manage and mentor verification teams (typically 3β4 engineers): assign tasks, review testbenches and coverage, and support complex debug.
- Develop verification plans that map requirements to testbench architecture, coverage goals, and resource allocation; track execution and adjust with evolving designs.
- Integrate and deploy Synopsys VCS, Verdi, and third-party VIP for protocols such as PCIe, Ethernet, USB, and DDR into customer environments.
- Debug complex multi-protocol, multi-domain SoC issues using waveform and coverage analysis and cross-functional collaboration.
- Identify project risks early, propose mitigations, and report status and blockers to management and customer stakeholders.
- Drive verification methodology improvements: UVM reuse, regression optimization, and new tool adoption.
Requirements
Key technical and leadership qualifications. Must-have items listed first; a few preferred items noted.
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Must-have: 5+ years of hands-on SoC, subsystem, or IP verification experience, including verification planning and coverage analysis.
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Must-have: Deep expertise in UVM testbench development, coverage analysis, and complex multi-domain debug.
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Must-have: Proven experience leading verification teams through full project cycles, including resource planning and delivery to customer schedules.
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Must-have: Working knowledge of industry-standard protocols (PCIe, Ethernet, USB, DDR) and their interaction in SoC architectures.
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Must-have: Hands-on proficiency with Synopsys VCS, Verdi or equivalent waveform analysis tools, and integration of third-party VIP.
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Preferred: Experience with ARM-based technologies (Coresight debug, processor architecture, AMBA protocols).
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Preferred: Solid understanding of ASIC design flows and RTL design concepts.
Education Requirements
Bachelor's or Master's degree in Electronics Engineering, Computer Engineering, or a related field. The posting pairs these degrees with the requirement for 5+ years of hands-on SoC/subsystem/IP verification experience.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

Date Posted: 2026-07-13