SOC Verification - Sr. Engineer

Job Title

SOC Verification - Sr. Engineer

Role Summary

Senior verification engineer in the Systems Solutions Group responsible for verification of processor-based SOCs for customer projects. The role focuses on building coverage-driven verification strategies, developing SystemVerilog/UVM testbenches, and debugging complex multi-clock SOC issues.

Work is customer-facing and centers on reducing silicon respins by catching critical bugs before tapeout.

Experience Level

Senior — 2 to 5 years of hands-on IP or SOC verification experience (as stated in the posting).

Responsibilities

Primary responsibilities include test plan creation, testbench development, integration, debugging, and mentoring.

• Build verification test plans from design specifications for processor-based SOCs: define scope, coverage goals, and realistic test scenarios.
• Develop and maintain SystemVerilog testbenches and UVM environments; integrate Synopsys and third-party VIPs for protocols such as AXI, USB, PCIe, and MIPI.
• Write and analyze SystemVerilog assertions; collect and track code, toggle, and functional coverage to close verification gaps before tapeout.
• Debug complex simulation failures across multi-clock-domain SOC designs using VCS, waveform viewers, and scripting to isolate root causes.
• Mentor junior verification engineers during design bring-up, testbench architecture decisions, and debugging sessions.
• Collaborate with architects, RTL designers, and post-silicon teams to align verification strategy with design intent and silicon validation plans.
• Script and maintain automation flows (shell, Makefile, Perl) to improve regression efficiency and testbench reusability.

Requirements

Must-have technical skills and experience; nice-to-have items listed separately.

• Must-have: Strong working knowledge of SystemVerilog and UVM for processor-based SOC verification.
• Must-have: Experience with VCS, waveform debugging tools, and integrating third-party or Synopsys VIPs into testbenches.
• Must-have: Solid understanding of AXI/AMBA protocol variants and corner-case/error behavior.
• Must-have: Proficiency scripting automation and regression flows using shell, Makefile, or Perl.
• Must-have: Working knowledge of ASIC design flow and RTL design concepts.
• Nice-to-have: Experience with ARM core verification.
• Nice-to-have: Experience with USB, PCIe, or MIPI protocols.

Education Requirements

Bachelor's or Master's degree in Electronics Engineering or a related technical field (as stated). No explicit alternative "equivalent experience" language was provided.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.