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SoC Verification Architect - Digital (SystemVerilog / UVM)

STMicroelectronics
June 02, 2026
Full-time
On-site
Naples, NA, Italy
Verification Jobs, Level - Senior

Job Title

SoC Verification Architect - Digital (SystemVerilog / UVM)

Role Summary

Lead the verification strategy and execution for digital SoC blocks and subsystems. Work within the STMicroelectronics Italia verification team to define architecture, drive verification environments, and ensure functional coverage and product quality.

Experience Level

Senior level. The posting indicates approximately 5–8 years of digital verification experience.

Responsibilities

Primary responsibilities include defining verification strategy, developing verification environments, and coordinating with design teams.

  • Define verification architecture and strategy for SoC digital blocks and interfaces.
  • Design and implement SystemVerilog/UVM testbenches and verification components.
  • Create and execute verification plans, tests, and coverage-driven closure activities.
  • Develop automation, debug scripts and utilities in C and Python to support verification and regression flows.
  • Lead root-cause analysis and debug of functional failures across RTL, testbench, and tools.
  • Collaborate with RTL designers, tools engineers, and system teams to integrate verification flows.
  • Mentor junior verification engineers and review verification deliverables.

Requirements

Core technical and professional requirements for successful candidates.

  • Extensive experience with SystemVerilog and UVM for complex SoC verification.
  • Proficiency in C and Python for testbench utilities, stimulus generation, and automation.
  • Proven experience in writing directed and constrained-random tests and achieving coverage closure.
  • Strong debug skills across simulation flows and familiarity with verification tools (simulators, coverage tools, emulation is a plus).
  • Experience defining verification strategies and leading cross-functional verification activities.
  • Good communication skills and ability to work in a team-oriented engineering environment.
  • Nice-to-have: experience with formal methods, emulation, low-power verification, or SoC-level verification integration.

Education Requirements

Bachelor's degree in Electronic Engineering (Ingegneria Elettronica) is expected.


About the Company

Company: STMicroelectronics

Headquarters: Geneva, Switzerland

Global semiconductor company that designs, develops and manufactures a broad range of semiconductor integrated circuits and discrete devices for automotive, industrial, personal electronics and communications markets. Offers microcontrollers, sensors, power management, analog and mixed-signal solutions and related software and services.

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Date Posted: 2026-06-03