SoC STA/Timing Engineer, Staff

Job Title

SoC STA/Timing Engineer, Staff

Role Summary

Senior timing engineer responsible for static timing analysis (STA), timing signoff, and timing convergence for multi-mode, multi-voltage SoC and subsystem designs. Member of the Hardware Engineering team collaborating with design, synthesis, CAD, physical implementation, DFT and technology teams.

Experience Level

Senior — staff-level role. The posting specifies 7–10 years of relevant experience is required.

Responsibilities

Core responsibilities include timing setup, analysis, and flow automation to achieve timing closure across conditions.

• Perform STA setup, convergence, reviews, and signoff for multi-mode, multi-voltage domain SoC and subsystem designs.
• Validate and debug timing across multiple PVT corners using PrimeTime and/or Tempus.
• Run and correlate Spice simulations with STA results to improve flow accuracy.
• Develop and automate STA/PD flows and timing methodologies using TCL/Perl/Python.
• Drive timing ECO flows (DMSA, tweaker, PrimeClosure) and perform RTL-to-netlist equivalence checks.
• Collaborate with design, DFT, synthesis, technology, CAD and physical implementation teams to resolve timing issues.
• Apply low-power timing techniques such as clock gating and power gating; manage multi-voltage domain timing.

Requirements

Must-have technical skills and tools for immediate contribution; preferred items listed separately.

• Strong STA fundamentals including AOCV/POCV concepts, clock-tree synthesis (CTS), and timing constraints.
• Hands-on experience with STA tools: PrimeTime and/or Tempus.
• Familiarity with back-end implementation tools: ICC2 or Innovus.
• Understanding of signal integrity, cross-talk noise, and parasitic extraction.
• Scripting proficiency in TCL, Perl, and Python for flow automation.
• Experience with Spice simulations (HSpice, FineSim) and Monte Carlo analysis.
• Proven ability to mentor junior engineers on timing flows and methodologies.

Nice-to-have:

• Experience driving timing convergence at chip and hard-macro levels.
• Exposure to RTL-to-GDSII flows and strong technical writing/communication for cross-team collaboration.

Education Requirements

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with 4+ years of hardware engineering experience; OR Master's degree in the same fields with 3+ years of relevant experience; OR PhD in the same fields with 2+ years of relevant experience. Related-field or equivalent practical experience is acceptable per the posted minimum qualifications.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.