SoC STA Engineer

Job Title

SoC STA Engineer

Role Summary

Work on static timing analysis (STA) and timing convergence for multi-mode, multi-voltage SoC designs within Qualcomm's Hardware Engineering team. Responsible for timing signoff, validation across PVT corners, and methodology and tool development to meet silicon performance and schedule targets.

Experience Level

Mid-level. Typical experience: 5–10 years in STA/timing analysis. Employer minimums: Bachelor's +6 years, Master's +5 years, PhD +4 years of relevant hardware engineering experience.

Responsibilities

Primary responsibilities include timing analysis, convergence, and automation for SoC designs:

• Perform STA setup, convergence, reviews, and signoff for multi-mode, multi-voltage domain designs.
• Execute timing analysis, validation, and debug across multiple PVT conditions using PrimeTime/Tempus.
• Run PrimeTime and/or Tempus for STA flow optimization and SPICE-to-STA correlation.
• Evaluate timing methodologies and tools across designs and technology nodes.
• Develop automation scripts within STA/PD tools to improve methodology and productivity.
• Drive timing closure at chip level and hard-macro level and collaborate with cross-functional teams.
• Document technical findings and present reviews.

Requirements

Must-have technical skills and experience:

• Strong expertise in STA timing analysis concepts (AOCV/POCV, CTS, timing constraints, latch transparency, 0-cycle and multi-cycle paths).
• Hands-on experience with STA tools such as PrimeTime and/or Tempus.
• Familiarity with digital implementation and back-end flows (ICC/Innovus) and RTL-to-GDS flows.
• Experience with circuit simulation tools (HSPICE/FineSim) and Monte Carlo analysis for process enablement.
• Scripting proficiency in TCL, Perl, Python; familiarity with Awk is a plus.
• Good technical writing and communication; ability to work in cross-collaborative teams.

Nice-to-have:

• Knowledge of cross-talk, signal integrity, layout parasitic extraction, and feed-through handling.
• Experience evaluating multiple timing methodologies/tools on different technology nodes.

Education Requirements

Required: Bachelor's, Master’s or PhD in Computer Science, Electrical/Electronics Engineering, Microelectronics, VLSI or related engineering fields. Employer-listed minimum experience by degree: Bachelor's +6 years, Master's +5 years, PhD +4 years. The posting also references B.Tech / MTech / MS in Electrical/Electronics/Microelectronics/VLSI.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.