SoC RTL Design Engineer (Up to Principal Level)

Job Title

SoC RTL Design Engineer (Up to Principal Level)

Role Summary

Work on RTL integration and front-end readiness for complex SoC and subsystem designs. The role focuses on RTL integration, synthesis preparation, constraint management, and design-quality checks to enable downstream implementation and verification.

The engineer will collaborate with IP designers, architects, verification, physical design, DFT, emulation, firmware, and methodology teams across the global organization.

Experience Level

Levels range from Engineer through Principal. Typical guidance: Engineer-level roles start at ~3+ years relevant experience; senior/staff/principal roles expect several additional years and leadership responsibilities.

Responsibilities

Primary responsibilities include integrating RTL, preparing designs for synthesis and implementation, and driving front-end quality and readiness.

• Integrate RTL from multiple IPs, subsystems, and reusable components into SoC- and subsystem-level designs.
• Develop and maintain top-level RTL wrappers, hierarchy, interconnect, clock/reset, interrupt, and configuration logic.
• Implement and verify standard SoC interfaces and protocols (AXI, AHB, APB, memory, debug, interrupt, clock/reset, power-management).
• Coordinate IP releases, manifests, build configurations, and integration dependencies.
• Run and debug RTL compile/elaboration, lint, CDC/RDC checks, formal connectivity, and synthesis flows.
• Prepare RTL, constraints, libraries, and inputs for synthesis and downstream physical implementation.
• Analyze synthesis reports for timing, area, power, high-fanout, unmapped logic, and design-rule issues.
• Collaborate with physical design to resolve critical timing paths, congestion, and implementation constraints.
• Support functional equivalence, gate-level simulation, emulation, FPGA bring-up, ECOs, and release-readiness activities.
• Investigate build and tool failures, identify root causes, and drive corrective actions; participate in design and code reviews.

Requirements

Must-have skills and experience for successful execution of the role.

• 3+ years of relevant RTL/SoC front-end experience (for Engineer-level roles); more experience expected for senior levels.
• Hands-on experience with Verilog or SystemVerilog and hierarchical RTL design integration.
• Experience with RTL simulation, compilation/elaboration, lint, CDC/RDC, and synthesis/front-end design flows.
• Solid understanding of digital design fundamentals, timing concepts, clock/reset design, bus protocols, and hardware/software interfaces.
• Ability to analyze technical problems, communicate root cause clearly, and work effectively in distributed, cross-functional teams.
• Nice-to-have: experience integrating complex SoCs or subsystems, synthesis/timing analysis, formal equivalence, ECOs, or gate-level simulation.
• Nice-to-have: low-power design knowledge (power intent, isolation, retention, multi-voltage), scripting for flow automation (Python/Perl/Tcl/Shell), and familiarity with commercial/internal EDA tools.

Education Requirements

Degrees and equivalent-experience options mentioned in the posting: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field is stated; a Master’s or PhD in those fields is listed as preferred for higher levels. The posting also includes alternate minimums where a Bachelor's plus 8+ years, a Master’s plus 7+ years, or a PhD plus 6+ years of relevant hardware engineering experience satisfies requirements. The posting also references shorter guidance (e.g., ~3+ years) for more junior engineer levels and allows equivalent practical experience.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.