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SoC Physical Design Engineer (Sr Staff)

Synopsys
August 21, 2026
Full-time
On-site
Tokyo, Tokyo, Japan
Physical Design Jobs, Level - Senior

Job Title

SoC Physical Design Engineer (Sr Staff)

Role Summary

Senior back-end SoC engineer responsible for driving physical implementation and tape-out success for customer IC projects using Synopsys EDA tools. The role works on timing closure, IR/EM, and physical verification while interfacing directly with customer design teams.

May act as a project lead, coordinating across front-end/back-end engineers, Synopsys teams, and R&D to deliver high-quality technical solutions and transfer best practices to customers.

Experience Level

Senior β€” typically requires 10+ years of industry experience in SoC/physical design engineering.

Responsibilities

Primary responsibilities include:

  • Collaborate with front-end/back-end and customer engineers to deliver tape-outs from RTL or netlist to GDS using Synopsys EDA tools.
  • Execute and optimize physical implementation flows, timing closure, STA, and IR/EM analysis.
  • Perform physical verification and support resolution of layout and signoff issues.
  • Work as part of the customer's IC design team to provide immediate project impact and transfer knowledge for future projects.
  • Interact regularly with customers to identify and remove blockers to project success.
  • Plan and manage delivery of assigned project tasks with minimal supervision; escalate and coordinate resources as needed.
  • Provide feedback to R&D/AE on tool enhancements and contribute to technical proposals and project lifecycle activities.

Requirements

Minimum and preferred qualifications.

  • Must-have: 10+ years of industry experience in SoC engineering.
  • Expertise in physical implementation, timing closure, static timing analysis (STA), and IR/EM.
  • Proficiency with Synopsys EDA tools and APR/physical verification workflows.
  • Strong customer-facing skills and ability to communicate clearly in English (verbal and written).
  • Ability to manage complex tasks independently and work collaboratively across teams.

Nice-to-have:

  • Experience with UPF and low-power design techniques.
  • Prior project leadership, proposal development, or formal mentoring experience.

Education Requirements

Bachelor's degree in Electrical Engineering (BSEE) or higher is specified.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-08-18