SoC Physical Design CAD Engineer (Staff/Sr Staff)
QualcommJob Title
SoC Physical Design CAD Engineer (Staff/Sr Staff)
Role Summary
Drive development, deployment, and support of Physical Design (PD) CAD methodologies, flows, and automation for complex SoC programs. Work to enable scalable PD infrastructure, improve design productivity, and ensure robust implementation and signoff.
Partner with Physical Design, STA, DFT, CAD teams and EDA vendors to evaluate tools, validate flows, and deploy methodology improvements across advanced process nodes.
Experience Level
Senior - typically requires 7+ years of relevant experience in Physical Design CAD, methodology, or design automation.
Responsibilities
Primary responsibilities include developing PD flows, automation, and providing technical leadership across projects.
- Develop and maintain Physical Design flows for floorplanning, place-and-route (PnR), CTS, routing, IR/EM, and signoff.
- Build and maintain automation and infrastructure using Tcl, Python, Perl, and shell scripting.
- Drive methodology improvements for timing, power, area, and design convergence across SoC projects.
- Collaborate with PD, STA, CAD teams and EDA vendors to evaluate and deploy new tools and technologies.
- Debug flow, tool, and methodology issues and implement scalable solutions across projects.
- Lead flow validation, regression automation, and deployment for advanced technology nodes.
- Provide technical leadership and mentor junior engineers.
Requirements
Must-have technical skills and environment experience. Education requirements are summarized in the Education Requirements section below.
- Strong understanding of Physical Design implementation and signoff flows.
- Expertise in scripting: Tcl, Python, Perl, and shell; comfortable in Linux environments.
- Hands-on experience with industry-standard EDA tools (Cadence and/or Synopsys).
- Experience building automation, flow validation, and regression frameworks.
- Ability to diagnose and resolve tool, flow, and methodology issues at scale.
- Demonstrated technical leadership and mentoring capability.
Nice-to-have:
- Experience with advanced process nodes (7nm and below).
- Familiarity with STA, IR/EM, power integrity, and physical verification flows.
- Exposure to AI/ML-driven design automation and flow optimization.
Education Requirements
Posting references technical degrees and degree-plus-experience options: Bachelor's, Master's, or PhD in Computer Science, Electrical/Electronics Engineering, VLSI, or related engineering fields. The posting shows degree-plus-experience examples (e.g., Bachelor's with ~6+ years, Master's with ~5+ years, PhD with ~4+ years) and elsewhere references 7+ years for the role; equivalent practical experience is implied where degree-plus-experience options are listed.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
