SOC/IP Integration Engineer

Job Title

SOC/IP Integration Engineer

Role Summary

The SOC/IP Integration Engineer is responsible for subsystem and SoC-level integration of internal and third-party IPs, ensuring functional and timing closure and delivering integration handoff artifacts. The role works with customers and cross-functional teams to resolve integration issues and report progress.

This is a fully remote position within the United States; occasional travel to client offices may be required by client leadership.

Experience Level

Mid-level. The posting expects mid-career experience (typically 5–7 years) or equivalent practical experience.

Responsibilities

Core responsibilities include integration, verification, and closure activities at subsystem/SoC level.

• Integrate 1P and 3P IPs into subsystems and SoCs, generate 3P fabrics, perform quality checks, and prepare PD handoff materials.
• Perform SS integration using Verilog/SystemVerilog and handle synthesis and timing constraint flows.
• Address floor-planning considerations and optimize performance for timing and area.
• Drive design-quality closure activities including CDC analysis, lint, RDC checks, and register integration.
• Troubleshoot complex integration issues and implement process improvements to streamline integration.
• Communicate status and technical progress to customers and stakeholders on a regular basis.

Requirements

Required technical skills and behavioral expectations. Education notes are in the Education Requirements section below.

• Strong understanding of RTL and digital design concepts.
• Hands-on experience with Verilog/SystemVerilog, synthesis tool flows, and timing constraint management.
• Demonstrated experience with subsystem/SoC integration and third-party IP integration.
• Practical experience with CDC, lint, RDC checks, and register integration to achieve design-quality closure.
• Ability to work independently, solve complex problems, and provide informal guidance to junior engineers.
• Effective customer-facing communication and regular progress reporting.
• Nice-to-have: experience with floor-planning, PD handoff processes, and fabric generation for 3P IPs.

Education Requirements

Typically requires a 4-year bachelor's degree plus 5–7 years related experience; alternatively 3 years of experience with an advanced degree, or equivalent work experience. The posting does not specify fields of study or certifications.

About the Company

Company: eInfochips

Headquarters: Bengaluru, India

eInfochips is a product engineering and semiconductor design services company offering embedded software, SoC design and verification, testing, and IoT solutions. It operates as part of Arrow Electronics, serving clients across industries worldwide.