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SoC Interconnect Technology Team Lead

Arm
July 16, 2026
Full-time
On-site
San Diego, California, United States
$242,760 - $314,160 USD yearly
Semiconductor IP Jobs, Level - Senior

Job Title

SoC Interconnect Technology Team Lead

Role Summary

Lead the architecture, design, and delivery of coherent and non-coherent SoC interconnect solutions across mobile, battery-operated, and large-scale compute platforms. Manage a team of architects and engineers to produce robust interconnect IP and ensure system-level performance, power efficiency, and integration.

Experience Level

Senior β€” typically requires 15+ years of experience in SoC architecture or design with leadership responsibility and tape-out delivery experience.

Responsibilities

Accountable for system-level interconnect architecture, execution, and team leadership.

  • Lead architecture and development of coherent and non-coherent interconnect fabrics for complex SoCs.
  • Define system-level interconnect strategy: topology, QoS, latency, bandwidth, and power optimization.
  • Collaborate with CPU, GPU, NPU, memory, and system teams to ensure integration and performance scaling.
  • Drive adoption and implementation of industry standards (e.g., AMBA AXI/ACE/CHI or equivalent).
  • Own performance modeling, analysis, and bottleneck identification across use cases.
  • Guide microarchitecture, RTL design, and verification strategy for interconnect IP.
  • Lead debug and root-cause analysis of complex system-level issues.
  • Mentor and grow a team of architects and engineers and contribute to product roadmap planning.

Requirements

Must-have technical experience and leadership skills; preferred items listed separately.

Must-have
  • 15+ years of experience in SoC architecture/design with a focus on interconnects or system fabrics.
  • Proven track record delivering large-scale SoCs (mobile, battery-powered, or high-performance compute).
  • Deep understanding of coherent interconnect protocols (AMBA ACE, CHI, CCIX, CXL, or similar).
  • Strong experience with non-coherent interconnects (AXI, NoC-based fabrics).
  • Expertise in performance analysis, modeling, and system trade-offs (latency, bandwidth, power).
  • Solid knowledge of cache coherency, memory hierarchy, and system architecture.
  • Experience leading cross-functional teams and driving projects to tape-out.
Nice-to-have
  • Experience with battery-optimized SoC design (low power, DVFS, power domains).
  • Familiarity with AI/ML accelerators, GPUs, or heterogeneous compute systems.
  • Exposure to network-on-chip (NoC) design methodologies and tools.
  • Experience with silicon bring-up and post-silicon validation.
  • Strong leadership, communication, and stakeholder management skills.

Education Requirements

Not specified.


About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.

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Date Posted: 2026-07-13