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SoC Engineering Staff Engineer

Synopsys
July 13, 2026
Full-time
On-site
Ho Chi Minh City, Vietnam
Physical Design Jobs, Level - Senior

Job Title

SoC Engineering Staff Engineer

Role Summary

Senior physical design engineer responsible for RTL-to-GDSII implementation and signoff of UCIE IP. Work within an IP/SoC engineering team to floorplan, place-and-route, close timing, and complete signoff for advanced-node designs.

Primary mission: deliver high-quality, tape-out-ready IP by improving flows, integrating complex macros and third-party blocks, and automating repeatable tasks.

Experience Level

Senior-level. The posting requests 5+ years of hands-on block-level physical design experience, including exposure to advanced nodes (7nm or below).

Responsibilities

Core responsibilities include ownership of the physical implementation flow and collaboration across architecture, RTL, and circuit teams.

  • Own and optimize RTL-to-GDSII flow: floorplanning, place & route, timing closure, and signoff.
  • Integrate macros, covercells, and third-party IP with correct abutment and power planning.
  • Perform IR-drop and electromigration analysis and LVS/DRC signoff preparation.
  • Automate and maintain tool flows using Tcl and Python; debug complex tool and flow issues.
  • Prepare tape-out views, documentation, and foundry design rule checklists through signoff.
  • Collaborate with cross-functional teams to translate design intent into physical implementation and prevent late-stage issues.

Requirements

Must-have technical skills and experience.

  • 5+ years of block-level physical design experience on advanced process nodes (7nm or below).
  • Deep knowledge of floorplanning, place-and-route, timing closure, IR-drop and electromigration analysis, and LVS/DRC signoff.
  • Proficiency with PrimeTime and IC Compiler II or Fusion Compiler; experience with ICV and RedHawk.
  • Proven experience integrating complex IP blocks and driving designs through tape-out.
  • Strong scripting skills in Tcl and Python for flow automation and debugging.
  • Nice-to-have: experience with UCIE or die-to-die interconnect standards.

Education Requirements

Not specified.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-07-09