SoC Engineering Sr Staff Engineer

Job Title

SoC Engineering Sr Staff Engineer

Role Summary

Senior physical design engineer responsible for owning and delivering full RTL-to-GDSII physical implementation for advanced process nodes (7nm/5nm/3nm). Works within a global physical-design team to ensure timing, power, and layout quality for tape-outs.

Experience Level

Senior — typically 5+ years of hands-on experience in physical design for advanced nodes.

Responsibilities

Deliver and optimize full-chip and block-level physical design flows and collaborate across teams to meet schedule and quality targets.

• Own RTL2GDSII implementation including synthesis, place & route, CTS, and timing closure for advanced nodes (7nm/5nm/3nm).
• Perform static timing analysis (STA), EMIR analysis, physical verification, and floor-planning at block and full-chip levels.
• Use and optimize Synopsys EDA tools (Design Compiler, IC Compiler II, PrimeTime) in design flows.
• Develop and maintain automation scripts (Python, PERL, TCL, or similar) to improve flow efficiency.
• Collaborate with cross-functional and geographically distributed teams to resolve design issues and meet schedules.
• Contribute to methodology improvements and mentor junior engineers.

Requirements

Key technical skills and experience required; listed as must-have and nice-to-have where applicable.

• Must-have: 5+ years of relevant physical-design experience with advanced technology nodes (7nm/5nm/3nm).
• Must-have: Hands-on experience with RTL2GDSII flows: synthesis, place & route, CTS, timing optimization, STA, timing closure, EMIR, and physical verification.
• Must-have: Proficiency with Synopsys tools such as Design Compiler, IC Compiler II, and PrimeTime.
• Must-have: Strong scripting/automation skills (Python, PERL, TCL, or similar).
• Must-have: Experience with block-level and full-chip floor-planning and timing-closure techniques.
• Nice-to-have: Exposure to high-frequency and low-power design methodologies; prior mentoring or leadership within design teams.
• Nice-to-have: Prior tape-out ownership on advanced-node projects.

Education Requirements

Bachelor's or Master’s degree (BE/BTech/MTech or equivalent) in Electronics, Electrical Engineering, Computer Engineering, Computer Science, or a related technical field — or equivalent practical experience.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.