SOC Design Verification Engineer – Pre-Si/Post-Si Verification

Job Title

SOC Design Verification Engineer – Pre-Si/Post-Si Verification

Role Summary

Join the Pre-silicon and Post-silicon SoC verification team to verify next-generation SoCs for mobile, AI, HPC, and cloud products. The role covers pre-silicon simulation, emulation/acceleration, and post-silicon bring-up and validation.

Engineer-level contributors execute verification tasks and debug under guidance; Senior Engineers own feature-level verification, lead complex debug, mentor peers, and improve methodology.

Experience Level

Mid-level role with hiring at Engineer and Senior Engineer bands. Typical experience: Engineer — ~2+ years; Senior Engineer — ~4+ years with demonstrated ownership of complex verification or silicon bring-up.

Responsibilities

Work across pre-silicon and post-silicon phases to validate SoC, subsystem, and IP features; scope varies by experience level.

• Develop and execute verification plans for SoC, subsystems, and IP across pre- and post-silicon phases.
• Build, enhance, and maintain SystemVerilog/UVM, C/C++, processor-based, emulation, and acceleration verification environments.
• Create directed, constrained-random, stress, performance, power, and system-level tests and scenarios.
• Develop assertions, functional coverage, checkers, scoreboards, and signoff metrics.
• Debug RTL, testbench, emulation, firmware, ATE/vector, and silicon bring-up issues using logs, waveforms, traces, and hardware debug data.
• Support post-silicon validation, ATE pattern debug, failure triage, and correlation between simulation, emulation, and silicon results.
• Drive coverage closure, regression health, bug tracking, and verification signoff.
• Participate in architecture, micro-architecture, design, validation, and test-plan reviews.
• For Senior Engineers: lead feature/subsystem verification from plan to closure, coordinate cross-team debug, mentor engineers, and drive methodology/automation improvements.

Requirements

Must-have technical skills and experience for successful execution of the role.

• Strong knowledge of SystemVerilog, UVM, and assertion-based verification.
• Proficiency in C/C++ and experience with processor-based verification environments.
• Experience in coverage-driven verification, regression development, and debug flows.
• Understanding of post-silicon concepts: bring-up, ATE/vector debug, failure triage, and correlation with pre-silicon results.
• Solid understanding of computer architecture, digital design fundamentals, and SoC integration.
• Strong debugging, communication, collaboration, ownership, and problem-solving skills.
• Familiarity with emulation/acceleration platforms and correlation between simulation, emulation, and silicon (preferred).
• Automation skills: Python, Perl, shell scripting or similar for regression, debug, and data analysis (preferred).
• Preferred experience areas: cache coherency protocols, memory subsystems, PCIe/CXL/Ethernet, AI accelerators, power/RAS, formal/portable stimulus, or firmware-driven validation.

Education Requirements

Bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, Computer Science, Science, or a related field; or equivalent practical experience.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.