SoC Design Verification Engineer
MatXJob Title
SoC Design Verification Engineer
Role Summary
Join MatX's silicon verification team to develop and validate verification solutions for blocks, subsystems, full-chip and system-level silicon used in high-performance AI compute. The role focuses on building scalable testbenches and closing functional and structural verification for silicon milestones through tapeout.
Experience Level
Mid-level. The posting covers early, mid and senior career ranges but does not specify exact years of experience for this role.
Responsibilities
The primary responsibilities center on verification planning, execution, and closure across subsystem and chip-level workstreams.
- Develop and maintain verification methodology and scalable solutions across blocks, subsystems, full-chip and system-level validation.
- Create and own testbenches, tests, and verification artifacts to meet structural and functional coverage targets.
- Plan and drive verification test plans, execution reviews, and verification closure for milestones including design freeze and tapeout.
- Contribute to integration of verification results into sign-off and silicon bring-up activities.
Requirements
Must-have technical skills and experience for successful performance in this role; nice-to-have items listed separately.
- Production experience with SystemVerilog and advanced verification methodologies such as UVM and assertion-based verification (ABV).
- Practical experience with simulation and formal verification flows.
- Concept-to-silicon verification experience: driving verification from architecture/design spec to production silicon.
- Experience writing portable tests and drivers suitable for silicon validation and post-silicon debug.
- Proficiency in Python and C/C++ for verification and silicon modeling.
- Strong understanding of micro-architecture and design concepts for high-performance compute, memory management, and high-speed connectivity.
- Excellent debug skills and experience collaborating on verification closure toward tapeout milestones.
Nice-to-have:
- Familiarity with Bluespec, emulation, and prototyping platforms.
- Hands-on participation in silicon debug and bring-up.
Education Requirements
Not specified.
Additional Information
This is a full-time role based in Mountain View with a hybrid schedule: remote Monday & Friday and in-office Tuesdays–Thursdays. Candidates must be authorized to work in the United States. The position requires compliance with U.S. export-control rules for access to controlled information.
About the Company
Company: MatX
Headquarters: Mountain View, California, USA
MatX specializes in creating faster chips for large language models (LLMs), focusing on innovative hardware and software solutions. The company fosters a collaborative and supportive work environment, welcoming candidates of all experience levels. Their approach prioritizes deep understanding and consideration of novel methods to drive efficiency and performance in their projects, particularly in silicon design and related engineering roles.
