SoC Design Verification Engineer

Job Title

SoC Design Verification Engineer

Role Summary

Member of the Server SoC Design Validation team working on next-generation Xeon server SoCs and IPs. Responsible for pre-silicon functional logic verification, emulation validation, and developing verification environments to ensure the SoC meets microarchitecture and design specifications.

The role requires collaboration with architects, RTL developers, post-silicon and physical design teams to identify, debug, and resolve functional, performance, and security issues.

Experience Level

Entry-level. The posting expects approximately 10+ months of relevant experience in silicon design/validation, x86 architecture, and design/validation of global domains; equivalent internship, project, or coursework experience is acceptable.

Responsibilities

Key responsibilities include pre-silicon verification, emulation validation, test development, and cross-team debugging.

• Perform functional logic verification and emulation validation of integrated SoCs to confirm design meets specifications.
• Define and develop scalable, reusable block, subsystem, and SoC verification plans, test benches, and verification environments.
• Execute verification plans and run emulation and system simulation models to verify design, analyze power/performance, and find bugs.
• Replicate, root-cause, and debug issues in the pre-silicon environment and implement corrective measures.
• Collaborate with SoC architects, micro-architects, RTL developers, post-silicon, and physical design teams to validate complex features.
• Document test plans and lead technical reviews with design and architecture teams.
• Include security activities in test plans (regression and debug) to ensure security coverage.
• Maintain and improve functional verification infrastructure and methodology; incorporate post-silicon findings into test plans.

Requirements

Minimum must-have skills and experience, plus preferred (nice-to-have) qualifications.

• Must-have: ~10+ months experience with silicon design and/or validation/verification.
• Must-have: ~10+ months experience with x86 architecture.
• Must-have: ~10+ months experience with design and validation of global domains (Reset, Clock, Fuse, GPIO, MPP).
• Strong debug skills and experience driving issues to closure.
• Experience across the verification life cycle: verification architecture, test planning, execution, debug, and coverage closure.
• Ability to collaborate across architecture, RTL, and physical design teams and to take ownership of assigned tasks.
• Nice-to-have: UVM/SystemVerilog constrained-random coverage-based verification and Formal Verification methodology.
• Nice-to-have: Experience with cache coherency principles and layered protocols (transaction, data link, PHY layers).
• Nice-to-have: Experience with Xeon CPU pre-silicon/emulation validation or post-silicon validation.
• Nice-to-have: Familiarity with one or more scripting languages to automate validation tasks.

Education Requirements

Master's degree in electrical engineering, computer engineering, computer science, engineering, or a related field. Experience may also be demonstrated through coursework, projects, research, internships, or relevant previous job experience.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.