SOC Design Verification Engineer

Job Title

SOC Design Verification Engineer

Role Summary

Responsible for functional logic verification of an integrated SoC: design and execute verification plans, develop reusable testbenches and environments, run simulations and emulation, and debug issues to ensure the design meets specifications.

Works within the Data Center Group verification team and collaborates with architects, RTL developers, postsilicon, and physical design teams. Hybrid on-site/off-site role based at the Fort Collins site.

Experience Level

Entry-level / Early career (College Graduate). Typical experience range: 0–3 years; specific minimums detailed below.

Responsibilities

Primary responsibilities include planning, executing, and improving presilicon verification activities for SoC designs.

• Define and develop block, subsystem, and SoC verification plans, testbenches, and verification environments to meet coverage and microarchitecture requirements.
• Execute verification plans using simulation and emulation; analyze power, performance, and functional behavior to find bugs.
• Replicate, root-cause, and debug presilicon issues and implement corrective measures.
• Collaborate with SoC architects, microarchitects, RTL developers, postsilicon, and physical design teams to improve verification strategies for complex features.
• Document test plans and lead technical reviews with design and architecture teams.
• Include security verification activities within test plans and maintain regression/debug tests for security coverage.
• Maintain and improve functional verification infrastructure and methodology; incorporate postsilicon learnings to improve presilicon coverage.

Requirements

Must-have technical skills and presilicon verification experience; preferred skills listed separately.

• Must-have: 1+ years SystemVerilog and UVM experience.
• Must-have: 2+ years Python for test automation.
• Must-have: C/C++ and scripting proficiency (Perl, Tcl, Shell) — ~6+ months.
• Must-have: 1+ years presilicon verification experience.
• Must-have: Linux/Unix and version control (Git, Perforce) — ~6+ months.
• Must-have: Regression testing and CI/CD pipeline experience — ~6+ months.
• Must-have: Knowledge of security verification methodologies — ~6+ months.
• Nice-to-have / Preferred: Experience with simulators (VCS, Xcelium, Questa), formal verification and coverage analysis, constrained-random and assertion-based verification.
• Nice-to-have / Preferred: Familiarity with x86 SoC or equivalent architectures, AMBA protocols (AXI/AHB/APB), memory subsystems and cache coherency, power management, and high-speed interfaces (PCIe, DDR, USB, Ethernet).

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science. (The posting indicates required qualifications are typically obtained through degree, research, relevant job experience, or internships.)

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.