SoC Design Verification Engineer

Job Title

SoC Design Verification Engineer

Role Summary

Member of the Server SoC Design Validation team responsible for pre-silicon functional verification and emulation validation of next-generation Xeon server SoCs and IPs. Work focuses on developing verification plans, building reusable testbenches, executing emulation/system simulation, and driving cross-team debug to ensure designs meet specifications.

Experience Level

Entry-level — targeted at recent graduates and engineers with approximately 1+ years of relevant experience.

Responsibilities

Primary responsibilities include:

• Perform functional logic verification and emulation validation of integrated SoCs.
• Define and develop scalable, reusable block, subsystem, and SoC verification plans and testbenches.
• Execute verification plans using emulation and system simulation models to verify functionality, analyze power/performance, and identify defects.
• Replicate, root-cause, and debug pre-silicon issues; implement corrective actions to resolve failing tests.
• Collaborate with SoC architects, micro-architects, RTL developers, post-silicon, and physical design teams to improve verification of architectural features.
• Document test plans and lead technical reviews with design and architecture teams.
• Include security validation activities in test plans and run regression/debug tests for security coverage.
• Maintain and improve functional verification infrastructure and methodology.
• Integrate post-silicon findings to update test plans and improve coverage for future products.

Requirements

Core technical requirements and desirable skills:

• Approximately 1+ years of relevant technical experience in silicon validation, verification, or similar roles (or equivalent practical experience).
• Experience with functional verification, emulation, system simulation, and RTL debug workflow.
• Strong problem-solving, debugging, and ownership skills; effective communicator and team collaborator.
• Familiarity with the complete verification lifecycle: verification architecture, test planning, execution, debug, and coverage closure.

Nice-to-have:

• Experience with UVM/SystemVerilog, constrained-random verification methodologies, and verification IP architecture.
• Experience developing, maintaining, and executing verification for complex IPs and SoCs.
• Experience with emulation validation, post-silicon validation, or Xeon CPU pre-silicon validation.
• Familiarity with layered protocols (transaction, data link, PHY) and cache coherency in multi-processor SoCs.
• Experience with scripting languages to automate validation tasks.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Science, Engineering, or a related field (with 1+ years related technical experience), or a Master's or PhD in those fields. Related coursework or equivalent practical experience in silicon design and/or validation/verification is acceptable.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.