SoC Design Implementation Engineer (Up to Principal Level)

Job Title

SoC Design Implementation Engineer (Up to Principal Level)

Role Summary

Implement front-end readiness and synthesis for complex SoC, subsystem, and IP designs, delivering clean, traceable netlists and handoff collateral to downstream physical-design and verification teams. Work cross-functionally with RTL design, architecture, PD, DFT, CAD/methodology, power-management, and global program teams to resolve timing, QoR, and power-intent issues.

Experience Level

Senior (role levels range from Engineer up to Principal). Experience guidance varies by level and degree: examples in the posting include Bachelor's +8+ years, Master's +7+ years, or PhD +6+ years; earlier-level assignments may accept ~3+ years for more junior engineer roles.

Responsibilities

Primary responsibilities span front-end implementation, constraint development, synthesis, and quality/debug activities.

• Support RTL-to-netlist implementation for blocks, subsystems, and SoC designs and manage handoff to Physical Design, DFT, and verification teams.
• Review RTL hierarchy, partitioning, clock/reset architecture, interfaces, and implementation requirements.
• Prepare and maintain synthesis scripts, file lists, libraries, operating conditions, scenarios, and implementation collateral.
• Develop, review, and validate timing constraints (clocks, generated clocks, exceptions, I/O delays, scenarios) for block and SoC levels.
• Run and debug synthesis flows; generate and analyze synthesis netlists, reports, and timing/QoR metrics.
• Analyze timing reports, debug unconstrained/invalid paths, and resolve timing-convergence, high-fanout, buffering, or congestion issues.
• Integrate and validate UPF-based power intent; debug power-intent interpretation and implementation issues.
• Drive implementation quality closure across lint, CDC/RDC, connectivity, synthesis, UPF, formal, and release-readiness checks.
• Collaborate with CAD/methodology to improve flow robustness, automation, runtime, and repeatability; document assumptions and handoff requirements.
• Mentor engineers and contribute to reusable methodology, automation, and best practices.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Proven experience with RTL-to-gate synthesis flows and front-end implementation handoff.
• Proficiency in Verilog/SystemVerilog and familiarity with RTL design and SoC integration concepts.
• Experience developing and reviewing timing constraints and performing static timing analysis and QoR investigations.
• Ability to debug synthesis, constraints, tool setup, library mismatches, inferred logic, X-propagation, and multiple-driver issues.
• Strong problem-solving and cross-functional collaboration skills; experience coordinating releases and resolving cross-team dependencies.
• Scripting and automation skills (Tcl, Python, Perl, Shell) for flow automation, report parsing, and regression infrastructure.
• Experience with timing closure across multi-mode, multi-corner scenarios and with timing exceptions (false paths, multicycle paths, clock groups).
• Nice-to-have: experience with UPF/low-power implementation, synthesis and STA tools, equivalence checking, DFT/physical-design handoff, emulation, gate-level simulation, and standard on-chip interfaces (AXI/AHB/APB).

Education Requirements

Degrees and equivalent-experience language found in the posting: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (listed as required in parts of the posting); Master's degree preferred. The posting also includes alternative qualification statements: Bachelor's +8+ years, Master's +7+ years, or PhD +6+ years of relevant Hardware Engineering experience. An earlier section also referenced ~3+ years relevant experience for more junior/engineer-level roles.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.