SoC Design Engineering Manager
Intel CorporationJob Title
SoC Design Engineering Manager
Role Summary
Lead and manage multi-disciplinary silicon design teams responsible for translating RTL to GDS and delivering manufacturing-ready SoC and IP design databases. Drive execution across physical design, logic, verification, circuit, and physical implementation to meet power, performance, area, cost, and quality targets.
Collaborate across IP and SoC teams and geographies to ensure timely tapeouts, continuous improvement of design processes, and effective team performance management.
Experience Level
Senior-level. The role expects extensive leadership experience managing large physical-design teams and delivering multiple SoC tapeouts; posting indicates ~18+ years of relevant experience.
Responsibilities
Principal responsibilities include technical leadership, program delivery, and team development.
- Manage and lead silicon design teams spanning physical design, logic, verification, circuit, and layout to deliver IP, subsystems, and SoCs.
- Oversee RTL-to-GDS implementation: synthesis, place-and-route, static timing analysis, and signoff flows to achieve manufacturing-ready databases.
- Plan and coordinate tapeout schedules and cross-functional milestones across geographies.
- Conduct design reviews focused on power, performance, area, cost, and manufacturability; drive corrective actions from verification and post-silicon data.
- Improve silicon development processes, architecture definition, and KPIs for design execution.
- Enable team execution through clear goals, accountability, performance management, and capability development.
- Foster cross-team collaboration and resolve complex technical issues impacting project delivery.
- Ensure compliance with Position of Trust requirements, including consent to extended background investigations where applicable.
Requirements
Must-have technical leadership and physical-design expertise.
- Proven track record managing large physical-design teams and delivering multiple SoC tapeouts on advanced technology nodes.
- Deep practical knowledge of RTL-to-GDS workflows, including synthesis, place-and-route, and static timing analysis.
- Experience building and scaling SoC design teams and driving engineering excellence in physical design execution.
- Strong analytical and problem-solving skills for complex design challenges.
- Excellent communication and organizational skills to coordinate cross-disciplinary, cross-geo projects.
- Demonstrated ability to drive continuous improvement and meet aggressive delivery targets.
Education Requirements
Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. The posting specifies approximately 18+ years of experience in physical-design execution (senior-level). Equivalent practical experience in lieu of degree was not explicitly stated.
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
