SoC Clock & Power Management Validation Lead, Staff (AI Accelerator Platform)

Job Title

SoC Clock & Power Management Validation Lead, Staff (AI Accelerator Platform)

Role Summary

Lead end-to-end validation of clock, power, reset, and power-management architectures for next-generation AI accelerator SoCs. The role sits on the System Validation & Emulation (SVE) team within SoC validation and focuses on pre- and post-silicon bare-metal validation, automation, and system-level debug to ensure production-quality silicon.

Experience Level

Senior - typically 5+ years of relevant experience in SoC validation, embedded systems, or related engineering roles.

Responsibilities

The role owns validation planning, test development, automation, and debug for clocking and power subsystems across pre-silicon and post-silicon platforms.

• Own E2E bare-metal framework validation for SoC clock and power architectures and power-subsystem bring-up readiness.
• Define validation methodology, stress workloads, and system-level test strategies for AI training and inference scenarios.
• Develop test plans and document test strategies, dependencies, and success criteria.
• Implement standalone and system tests and device drivers in C; integrate into scalable automation frameworks.
• Automate development, execution, and result inference using Python, Perl, and shell scripts.
• Debug complex issues on pre-silicon (emulation/FW) and post-silicon platforms; drive root-cause analysis with cross-functional teams.
• Review validation platform schematics and collaborate with platform design to ensure post-silicon debug support.
• Use lab instruments (multimeter, oscilloscope, logic analyzer) and debug tools (JTAG) for measurements and troubleshooting.
• Coordinate and communicate effectively with architecture, design, verification, and firmware teams across time zones.

Requirements

Key technical must-haves and practical skills required to perform the role.

• 5+ years of relevant experience in SoC validation, embedded software development, or related areas.
• Prior hands-on experience in clock and power validation for SoCs.
• Proficient in C and Python.
• Experience using lab instruments: multimeter, oscilloscope, logic analyzer.
• Familiarity with debug tools and methodologies for ARM-based SoCs (e.g., JTAG).
• Strong analytical, problem-solving, and debugging skills.

Nice-to-have

• Experience with cross-compilers, linkers, and makefiles.
• Understanding of cache coherency and concurrency in modern SoC architectures.
• Experience with PMICs and validating rail power (power measurement setups).
• Pre-silicon validation and debug on FPGA-based emulation platforms.
• Familiarity with RTL/HDLs such as Verilog/SystemVerilog.
• Experience working in a cross-functional matrix organization.

Education Requirements

Bachelor's degree in Engineering (electronics, computer engineering) or a related Science/Engineering field is stated. Alternative qualification paths listed: Bachelor's + 4+ years relevant ASIC/validation experience; Master's + 3+ years; PhD + 2+ years in Science/Engineering or related fields.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.