SOC Architect, Reality Labs Silicon
Meta PlatformsJob Title
SOC Architect, Reality Labs Silicon
Role Summary
As an SoC Architect on Reality Labs Silicon, you will define top-level architecture for AR/AI wearable chips, focusing on power- and size-constrained consumer devices. You will partner with firmware, software, IP vendors, RTL, and physical design teams to enable on-device AI, vision, and graphics workloads.
Compensation (United States): $178,000–$250,000 per year plus bonus, equity, and benefits.
Experience Level
Senior — requires 8+ years of relevant SoC architecture or system-level hardware design experience.
Responsibilities
Lead SoC architecture and cross-disciplinary hardware–software co-design to deliver power- and size-optimized wearable silicon.
- Define SoC-level architecture: compute subsystems, memory hierarchy, interconnect topology, and power delivery strategies.
- Lead architectural exploration and trade-off analysis across heterogeneous compute blocks (CPU, GPU, vision, audio, ML accelerators).
- Collaborate with algorithms, firmware, and software teams to drive hardware–software co-design decisions.
- Partner with IP vendors, IP architects, power/performance architects, and internal design teams to evaluate and integrate IP.
- Develop architectural specifications, interface definitions, and design guidelines for RTL and physical design teams.
- Provide architectural leadership and technical direction across silicon, systems, and platform teams.
- Contribute to long-term silicon roadmap planning and evaluate emerging process and memory technologies.
Requirements
Must-have technical skills and experience for immediate contribution; preferred items listed separately.
- 8+ years of SoC architecture, microarchitecture definition, or system-level hardware design for consumer electronics or mobile/wearable platforms.
- Experience architecting heterogeneous SoCs including CPU, GPU, neural processing, and hardware accelerators.
- Expertise with high-speed I/O interfaces such as PCIe, USB, and LPDDR.
- Experience with memory subsystem architecture: cache hierarchy design, DRAM interface optimization, and on-chip interconnect (NoC) design.
- Proven experience collaborating across hardware, firmware, and software disciplines to drive co-design for real-time or latency-constrained workloads.
Nice-to-have
- Experience architecting silicon for AR/VR or wearable devices with stringent power and thermal constraints.
- Experience with AI/ML accelerator architecture and optimizing memory hierarchy for on-device inference.
- Familiarity with advanced process node design considerations (e.g., 5nm and below).
- Experience with system MMUs and hardware security.
Education Requirements
Bachelor's degree in Computer Science, Computer Engineering, or a relevant technical field — or equivalent practical experience.
About the Company
Company: Meta Platforms
Headquarters: Menlo Park, California, United States
American technology company that develops social networking products (Facebook, Instagram, WhatsApp) and invests in virtual/augmented reality hardware and software through Reality Labs, focusing on connectivity, advertising, and immersive computing experiences.
