SLD Avionics FPGA Engineer III - Lunar Permanence

Job Title

SLD Avionics FPGA Engineer III - Lunar Permanence

Role Summary

Develop, verify, and test HDL for FPGA-based avionics used on lunar landers and related spaceflight systems. Work on a cross-functional team of systems, hardware, and software engineers within the Lunar Permanence business unit to produce reliable FPGA designs for harsh environments.

Collaborate directly with NASA and national partners on the Human Landing System program and support integration and flight-system verification activities.

Experience Level

Mid-level. Minimum 5+ years of FPGA/ASIC design and verification experience; senior-level experience (8+ years) is preferred but not required.

Responsibilities

Accountabilities include design, verification, and integration of FPGA logic and associated test artifacts.

• Develop RTL and FPGA implementations using Verilog/SystemVerilog/VHDL.
• Define and document HDL requirements in coordination with systems, hardware, and software teams.
• Create and run verification environments and testbenches (UVM/OVM, assertions, coverage) and debug simulation failures to root cause.
• Perform constraint definition, CDC analysis, static timing analysis (STA), and timing closure activities.
• Use FPGA vendor toolflows (Vivado, Quartus, Lattice, Libero) and simulators (ModelSim/QuestaSim) for development and verification.
• Participate in design reviews, integration testing, and generation of verification documentation.
• Coordinate with NASA and partner teams during development and test phases; travel up to ~10% to Blue Origin sites for meetings or events.

Requirements

Must-have technical skills, authorization, and job-related capabilities.

• 5+ years of FPGA/ASIC design and verification experience.
• Proficient writing RTL in Verilog, SystemVerilog, or VHDL (SystemVerilog preferred).
• Experience with CDC, constraint definition, STA, and timing closure.
• Familiarity with FPGA toolchains such as Xilinx Vivado, Intel Quartus, Lattice Diamond/Radiant, or Microchip Libero.
• Experience using ModelSim, QuestaSim, or equivalent simulators.
• Proven ability to write verification testbenches (UVM/OVM), use assertions, and perform functional/code coverage analysis.
• Skilled at debugging simulation and verification failures to root cause.
• Effective written and verbal communication within multidisciplinary teams.
• Willingness to travel approximately 10% for meetings or company events.
• Must be authorized to work in the United States: U.S. citizen or national, U.S. permanent resident (Green Card holder), or lawfully admitted as a refugee or granted asylum.

Education Requirements

Bachelor's or Master’s degree in computer engineering, electrical engineering, computer science, mathematics, physics, aerospace, or a related technical field.

Preferred Qualifications

Nice-to-have skills and experience that strengthen a candidate's fit.

• 8+ years of FPGA/ASIC development experience.
• Scripting experience (Perl, Python, Tcl).
• Experience with revision control systems (Git, SVN).
• Familiarity with on-chip bus protocols (AMBA/AXI/AHB/APB) and interfaces such as IEEE 802.3, XAUI, JESD204, I2C, SPI.
• Working knowledge of NPR 7150.2, DO-254, or other safety-critical standards.

About the Company

Company: Blue Origin

Headquarters: Kent, Washington, United States

Blue Origin is an American aerospace company developing technologies for spaceflight, including reusable launch vehicles, orbital and suborbital systems, and space infrastructure for commercial and government customers.