Senior Staff Engineer, Digital Design (Power & Analog ICs)

Job Title

Senior Staff Engineer, Digital Design (Power & Analog ICs)

Role Summary

Senior individual-contributor responsible for architecting and implementing digital logic embedded in power, analog, and mixed-signal IC products. Ownership spans requirements and microarchitecture through RTL, synthesis, timing closure, DFT support, and silicon bring-up.

Collaborate with analog design, verification, physical design, test, applications, and product teams to deliver control, sequencing, protection, diagnostics, trimming, communication, test, and safety-related logic for power and analog ICs.

Experience Level

Senior — typically 10+ years of relevant digital design, RTL development, and implementation experience for semiconductor products.

Responsibilities

Design and deliver high-quality embedded digital blocks for power and analog ICs, and provide technical leadership across projects.

• Translate product and circuit requirements into digital microarchitecture and block specifications.
• Design synthesizable RTL for control, sequencing, protection, diagnostics, trimming, communication, test, and low-power functions.
• Own block-level integration and contribute to chip-level digital architecture: interfaces, clocking, reset, power states, and register maps.
• Create synthesis scripts, timing constraints, and implementation collateral; guide synthesis and timing closure.
• Support DFT architecture and implementation: scan insertion, ATPG enablement, and test modes.
• Collaborate with verification teams on assertions, coverage, directed tests, and gate-level/post-layout verification.
• Support silicon bring-up, device evaluation, failure analysis, and practical workarounds for silicon issues.
• Drive reusable RTL, coding standards, design methodology, reviews, and automation across projects.
• Mentor junior engineers and communicate technical risks and recommendations to project leadership.

Requirements

Must-have technical skills and experience to execute the role successfully.

• Extensive hands-on experience in logic design, microarchitecture, and Verilog/SystemVerilog RTL coding.
• Proven experience with synthesis, static timing analysis (STA), and developing block/top-level timing constraints.
• Experience designing digital control logic embedded in PMICs, power-management, automotive, audio, or other mixed-signal ICs.
• Working knowledge of DFT, scan insertion, ATPG, test modes, CDC/RDC analysis, lint, and gate-level verification.
• Experience with synthesis flows, CDC checks, low-power verification, and handoff to physical design (place-and-route collaboration).
• Scripting and automation experience (TCL, Python, Perl, shell, or similar).
• Proven ability to own complex design blocks, influence chip-level decisions, mentor engineers, and lead technical reviews.
• Strong communication and cross-functional collaboration skills in multisite, multicultural teams.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or a related discipline.

About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.