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Senior Engineer, Digital Design

Renesas
August 22, 2026
Full-time
On-site
Bengaluru, Karnataka, India
RTL Design Jobs, Level - Senior

Job Title

Senior Engineer, Digital Design

Role Summary

Lead RTL design and development of complex IPs and subsystems for MCU SoCs. Work with architecture, verification, physical design and software teams to deliver integrated silicon blocks that meet performance, power, and area targets.

This role includes ownership of RTL deliverables, support for SoC integration, and mentoring of junior engineers to raise design quality and throughput.

Experience Level

Senior β€” typically requires 8+ years of hands-on digital IC/ASIC design experience.

Responsibilities

Primary responsibilities include leading RTL work, integration, and quality assurance for assigned blocks.

  • Lead RTL design and development of complex IPs/subsystems within MCU SoCs to meet PPA targets.
  • Define micro-architecture and high-level digital design for assigned blocks.
  • Support SoC integration by delivering subsystem views, documentation, and integration-ready RTL.
  • Own RTL quality checks (lint, CDC, RDC) and support functional verification activities.
  • Collaborate with architects, verification, physical design, and software teams for end-to-end integration.
  • Mentor and provide technical guidance to junior engineers.
  • Drive improvements to RTL coding guidelines, design methodologies, and processes.

Requirements

Must-have technical skills and practical experience.

  • 8+ years of hands-on experience in digital IC/ASIC design with delivered silicon.
  • Strong RTL design skills using Verilog and/or VHDL.
  • Solid understanding of digital design fundamentals: timing analysis, clocking, resets, and verification methodologies.
  • Experience with EDA tools for synthesis, simulation, and static timing analysis.
  • Proven ability to own blocks end-to-end and troubleshoot complex design issues.
  • Good problem-solving skills and ability to document and communicate design intent.

Nice-to-have:

  • Experience owning complex IPs or subsystems in large SoCs and SoC-level integration experience.
  • Hands-on experience with RTL quality tools (e.g., Spyglass) and low-power design techniques.
  • Familiarity with synthesis flows, timing constraints, and physical design considerations.
  • Scripting skills (Shell, Perl, Python) or experience applying AI tools to design flows.

Education Requirements

Bachelor's degree in Electronics & Communication Engineering, Electrical Engineering, Computer Engineering, or a related technical field (as specified). The posting emphasizes relevant technical degree background for the role.


About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

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Date Posted: 2026-06-22