SIPI Characterization Engineer

Job Title

SIPI Characterization Engineer

Role Summary

Hands-on Signal Integrity, Power Integrity, and Characterization (SIPI) engineer responsible for electrical characterization of high-speed SerDes interfaces and power delivery networks across multi-chip AI accelerator systems. Lead test development, automation, and data pipelines to validate designs from early concept through production.

Position is based in Mountain View with an in-office cadence (Tuesdays–Thursdays). Candidates must be authorized to work in the United States.

Experience Level

Mid-level. Typical experience: 5–10 years in hardware characterization, SI/PI engineering or equivalent industry experience.

Responsibilities

Primary responsibilities include electrical characterization, automation, and collaboration with design teams:

• Characterize high-speed SerDes (PCIe, Ethernet, custom protocols): BER testing, eye diagram analysis, PVT sweeps, and Tx/Rx equalization tuning.
• Perform channel measurements (insertion loss, return loss, crosstalk) using VNA, TDR, and related instruments; correlate measurements with simulations.
• Measure and analyze PDN behavior: transient noise, dynamic voltage droop, impedance from board through package and silicon, and identify weaknesses.
• Architect and maintain scalable test automation frameworks and EDVT for thousands of SerDes channels; integrate lab instruments into automated flows.
• Build data pipelines for test result collection, statistical analysis, and visualization to support rapid triage and design decisions.
• Collaborate with SIPI, package, and PCB designers to influence PCB stackups, routing rules, decoupling strategies, and package/die interconnect choices.

Requirements

Must-have technical skills and experience; nice-to-have items listed separately.

• 5–10 years of industry experience in hardware characterization or SI/PI engineering with demonstrated hands-on lab work.
• Deep understanding of high-speed SerDes: PHY fundamentals, equalization, jitter decomposition, and link margin analysis.
• Strong knowledge of transmission line theory: wave propagation, impedance matching, reflections, skin effect, dielectric loss.
• Solid understanding of PDN design principles: target impedance, resonance, bypass capacitor placement, VRM loop dynamics.
• Hands-on proficiency with lab equipment (oscilloscopes, BERTs, VNAs, TDR, power analyzers) and measurement techniques.
• Experience developing test automation and instrument control in Python or equivalent scripting environments.
• Ability to develop correlation methodologies between simulation and measurement and to provide actionable design feedback.

Nice-to-have:

• Experience in AI accelerator or GPU system validation, JEDEC/PCIe compliance testing, SPC or large-scale silicon data analysis, and layout review for PCB/advanced package design.

Education Requirements

Bachelor's degree in Electrical Engineering is specified; an advanced degree (MS/PhD) is a plus.

About the Company

Company: MatX

Headquarters: Mountain View, California, USA

MatX specializes in creating faster chips for large language models (LLMs), focusing on innovative hardware and software solutions. The company fosters a collaborative and supportive work environment, welcoming candidates of all experience levels. Their approach prioritizes deep understanding and consideration of novel methods to drive efficiency and performance in their projects, particularly in silicon design and related engineering roles.