Simulation & Modeling Engineer

Job Title

Simulation & Modeling Engineer

Role Summary

Work on the functional model of Tensordyne's inference accelerator: implement architecture features, validate model behavior against RTL, and keep the model accurate and maintainable. This is a hands-on software role requiring hardware familiarity and close collaboration with architecture, hardware, and software teams.

Experience Level

Mid-level; requires 3+ years of industry experience.

Responsibilities

Key responsibilities for this role include:

• Implement new architecture features and algorithms in the functional model.
• Investigate and resolve mismatches between the model and hardware/RTL.
• Write tests, test plans, and test infrastructure; track code coverage.
• Document the model and validate it against the architecture specification and RTL.
• Evaluate and adopt effective modeling techniques.
• Maintain and improve the codebase for reliability and performance.
• Collaborate with architecture, hardware, and software teams to deliver features.

Requirements

Must-have technical skills and abilities:

• Strong modern C++ programming skills.
• Good knowledge of RTL and ASIC methodology.
• Solid understanding of hardware architecture.
• Proficient with build systems and toolchains.
• Ability to take loosely specified features to working, tested code with minimal supervision.
• Clear written and verbal communication; comfortable working across teams.

Nice-to-have:

• Knowledge of SystemC / TLM-2.0.
• Experience with AI/ML accelerators or GPU architectures.
• Experience with high-performance computing.
• Python for scripting and tooling.
• Experience with debugging and analysis tools (sanitizers, profilers, tracing).

Education Requirements

BS or higher in Computer Science, Computer Engineering, Electrical Engineering, or a related field. The posting specifies 3+ years of industry experience.

About the Company

Company: Tensordyne

Tensordyne is a startup developing high-performance, low-power AI inference processors and multi-chip systems for generative AI acceleration in data centers. The company focuses on ASIC design, verification, and integration of computational accelerators with third-party SoC IP.