Silicon Validation Engineer

Job Title

Silicon Validation Engineer

Role Summary

Join MatX's hardware team to lead silicon bring-up and validation from first power-on through production readiness for highly integrated SoCs and accelerator products. The role focuses on functional, performance, and reliability validation across silicon, package, board, firmware, and system integration.

Experience Level

Mid-level (no explicit years specified).

Responsibilities

Deliver and debug silicon validation activities spanning pre- and post-silicon environments and labs.

• Own silicon bring-up and validation from first power-on through feature validation and production readiness.
• Develop and execute validation plans for chip- and SiP-level functionality, performance, reliability, and system behavior.
• Validate boot, reset, initialization, power management, recovery, memory, interconnect, high-speed interfaces, and package-level functionality.
• Work across top-level DV, Palladium emulation, lab validation, and package validation to improve coverage and correlation between environments.
• Debug complex failures using logs, registers, traces, waveforms, firmware output, and lab equipment.
• Analyze issues across RTL, firmware, software, board, package, and silicon boundaries and drive them to root cause.
• Collaborate with architecture, design, DV, emulation, firmware, software, and product engineering teams.
• Define observability and debug requirements and improve validation automation, execution, and failure triage.

Requirements

Core qualifications and constraints for the role.

• Hands-on experience in silicon validation, post-silicon bring-up, hardware emulation, or top-level DV.
• Experience validating complex SoCs, accelerators, or highly integrated silicon products.
• Strong understanding of digital hardware, SoC architecture, and hardware–firmware interaction.
• Proven ability to debug complex cross-functional failures and drive them to root cause.
• Experience with real silicon and lab platforms; familiarity with lab equipment and low-level hardware access.
• Ability to read and debug C or C++ code; Python or similar scripting experience.
• Ability to read specifications, register descriptions, validation plans, and relevant RTL.
• Strong ownership, communication, and cross-functional collaboration skills.
• Must be authorized to work in the United States and able to work from MatX offices in Mountain View Tuesdays–Thursdays.
• Role requires access to information subject to U.S. export controls and is contingent on compliance with those controls.

Nice-to-have:

• Experience with both pre-silicon and post-silicon validation and Cadence Palladium.
• Experience with SystemVerilog, UVM, assertions, coverage, or waveform debug.
• Experience bringing up first silicon and with HBM, DDR, PCIe, CXL, Ethernet, die-to-die interfaces, or advanced packaging.
• Familiarity with JTAG, oscilloscopes, logic analyzers, or protocol analyzers.

Education Requirements

Not specified.

About the Company

Company: MatX

Headquarters: Mountain View, California, USA

MatX specializes in creating faster chips for large language models (LLMs), focusing on innovative hardware and software solutions. The company fosters a collaborative and supportive work environment, welcoming candidates of all experience levels. Their approach prioritizes deep understanding and consideration of novel methods to drive efficiency and performance in their projects, particularly in silicon design and related engineering roles.