Silicon Engineer, EDA Infrastructure

Job Title

Silicon Engineer, EDA Infrastructure

Role Summary

Join Meta's Silicon Engineering team to develop and maintain EDA tooling, flows, and automation that enable chip design teams to move from RTL to tape-out. The role sits at the intersection of software engineering and hardware design and focuses on building scalable EDA environments, optimizing flows, and keeping the design infrastructure reliable.

Experience Level

Mid-level. No explicit years of experience listed; role expects practical experience with EDA flows and infrastructure.

Responsibilities

Primary responsibilities include building and supporting the EDA infrastructure and automation that enable silicon development at scale.

• Install, configure, and manage versions of industry-standard EDA tools across the design environment.
• Build and improve automation and flow frameworks for RTL-to-GDSII steps such as synthesis, place-and-route, and physical verification.
• Collaborate with chip design engineers to identify and remove bottlenecks in EDA flows, improving runtime, capacity, and reliability.
• Support compute and storage infrastructure for EDA workloads, including job scheduling and license management.
• Develop monitoring and reporting tooling for EDA job health and flow metrics.
• Evaluate and integrate new EDA tools and methodologies into existing infrastructure.
• Document EDA flow components, infrastructure configurations, and internal tooling.
• Participate in debugging and root-cause analysis for flow failures and contribute to CI pipelines for silicon design flows.

Requirements

Must-have technical skills and experience.

• Hands-on experience with EDA tools and design flows (RTL synthesis, place-and-route, static timing analysis, or physical verification).
• Proficiency with scripting for flow automation (Python, Tcl, shell).
• Experience with Linux-based compute environments, job schedulers, and file system management.
• Experience working with or supporting hardware/chip design teams to improve engineering workflows.

Nice-to-have:

• Exposure to ASIC or custom silicon design methodologies and the RTL-to-GDSII flow.
• Experience with distributed compute environments and workload management for large-scale EDA deployments.
• Experience developing CI/CD pipelines or automated regression frameworks for hardware design.
• Familiarity with industry-standard EDA signoff and physical-design tools.

Education Requirements

Requires a Bachelor's degree in Computer Science, Computer Engineering, or a relevant technical field, or equivalent practical experience. (If pursuing a degree, it must be completed prior to joining Meta.)

About the Company

Company: Meta Platforms

Headquarters: Menlo Park, California, United States

American technology company that develops social networking products (Facebook, Instagram, WhatsApp) and invests in virtual/augmented reality hardware and software through Reality Labs, focusing on connectivity, advertising, and immersive computing experiences.