Silicon Architect, Diffusion ASICs

Job Title

Silicon Architect, Diffusion ASICs

Role Summary

Define architecture and microarchitecture for ASIC compute blocks targeting image and video diffusion inference. Work within a cross-functional engineering team to convert workload analysis and research into implementable hardware designs, FPGA prototypes, and production-ready silicon.

This role supports Normal Computing's effort to build AI accelerators optimized for diffusion inference as an alternative to GPU-based solutions.

Experience Level

Senior-level role; substantial prior experience in architecture or microarchitecture of high-performance digital systems is expected.

Responsibilities

Principal responsibilities include specification, evaluation, and validation of compute-tile architectures and collaboration across compiler and implementation teams.

• Define architecture and microarchitecture of AI accelerator compute blocks, with emphasis on PE array design and efficiency techniques.
• Translate workload analysis and research findings into clear hardware specifications for RTL implementation.
• Evaluate performance, power, and area (PPA) tradeoffs across the architecture stack and make design decisions with incomplete data.
• Collaborate with the compiler lead on ISA co-design to ensure the compute tile is compilable and programmable.
• Oversee FPGA prototyping to validate architecture decisions and support bring-up activities.
• Monitor AI accelerator research and compare approaches against the company's design direction.

Requirements

Must-have technical skills and practical experience for success in this role.

• Substantial experience in architecture or microarchitecture of high-performance digital systems, especially AI accelerators or complex digital logic.
• Proven ability to translate algorithm-level analysis into hardware specifications and back.
• Experience with simulation-driven architecture and cycle-accurate models to inform design tradeoffs.
• Familiarity with quantization and reduced-precision inference techniques and their hardware implications.
• Experience writing microarchitecture specifications and working closely with RTL engineers during implementation.
• Proficiency in Python or C++ for performance modeling and analysis; familiarity with SystemVerilog or equivalent RTL.
• Strong analytical skills and the ability to work in a dynamic, research-driven development environment.

Education Requirements

Degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience. A PhD in a related field is preferred but not required.

About the Company

Company: Normal Computing

Headquarters: New York, NY, USA

Normal Computing develops software and hardware solutions for the semiconductor and AI infrastructure industries, specializing in ASICs for image and video diffusion inference and AI accelerators. The company focuses on architecture and microarchitecture of compute blocks, PE array design, ISA co-design, and FPGA prototyping.