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Signal Integrity / Power Integrity / Board Design Engineer

Altera
July 09, 2026
Full-time
On-site
Haifa, Israel
Physical Design Jobs, Level - Entry or Early Career

Job Title

Signal Integrity / Power Integrity / Board Design Engineer

Role Summary

Join the SERDES Analog team in Haifa to support integration of mixed-signal and high-speed SERDES IP into full-chip silicon, packages, and PCBs. The role focuses on simulation, verification, and design support to meet signal and power integrity requirements.

Experience Level

Entry-level (early-career). Suitable for junior engineers or recent graduates with practical university project experience; typically 0–3 years.

Responsibilities

Key responsibilities include supporting IP integration, simulation, and verification activities for SERDES, package, and PCB designs.

  • Support SERDES IP system and channel simulations, including reference channel definition and parameter extraction under senior guidance.
  • Review and validate silicon IP parameters in conjunction with package and PCB designs per interface specifications.
  • Participate in package and PCB schematic/layout reviews, analyze simulation results, and help debug failing simulations.
  • Apply signal and power integrity simulation techniques for SIPI circuits, channels, and I/Os to optimize package and PCB designs.
  • Support design quality efforts to meet power, performance, and integrity targets.
  • Collaborate with cross-functional teams to ensure successful integration of IP, packages, and PCBs.

Requirements

Must-have technical skills and attributes; items below summarize the role's practical expectations.

  • Must-have: Strong background in electromagnetics and wave theory; ability to learn and apply theory across analog, digital, SI, and PI domains.
  • Must-have: Practical experience from university projects or equivalent hands-on academic work; motivated, team-oriented junior engineer.
  • Must-have: Understanding of high-speed signal design and power distribution networks (PDN).
  • Nice-to-have: Experience in ASIC package design (pinout optimization, stack-ups, high-speed routing).
  • Nice-to-have: Knowledge of silicon floor planning and SI/PI considerations.
  • Nice-to-have: Hands-on experience with test and measurement equipment such as oscilloscopes, TDR, and VNA.

Education Requirements

B.Sc. or M.Sc. in Electrical Engineering from a recognized university. The posting requests applicants include their academic grade sheet as part of the application.


About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.

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Date Posted: 2026-07-09