Shift Yield Defect Metrology Engineer

Job Title

Shift Yield Defect Metrology Engineer

Role Summary

Operate as the on-shift engineer responsible for real-time defect monitoring, analysis, and disposition to protect yield in a high-volume semiconductor manufacturing environment. Partner with integration, metrology, operations and global teams to identify yield limiters and drive corrective actions.

Experience Level

Mid-level. Ideal candidate has around 3 years of semiconductor high-volume manufacturing (HVM) experience, but the role is open to motivated fresh graduates with strong interest in semiconductor manufacturing.

Responsibilities

Primary responsibilities focus on shift operations, defect analytics, and cross-functional coordination to detect and resolve yield issues.

• Monitor defect signals, SPC, and inspection data during shifts; detect and escalate yield risks.
• Analyze high-volume manufacturing data using statistical methods and visualization to identify yield limiters.
• Compile and report defect data to support yield learning and stakeholder decision-making.
• Support hold-lot review and disposition decisions through defect analysis and risk assessment.
• Perform defect analysis, fault isolation, and failure investigation to determine root causes and impact on yield and reliability.
• Collaborate with integration, module, metrology, and operations teams to implement corrective actions.
• Improve defect classification and support ADC model validation and continuous learning.
• Contribute to defect specification, OCAPs, best-known methods, and cross-site standardization.
• Lead or deliver technical training and mentorship to technicians to ensure consistent execution.

Requirements

Clear, practical must-have skills for effective shift support and problem resolution; preferred skills that accelerate impact are listed separately.

Must-have

• Strong communication skills for collaboration with global teams, including US stakeholders.
• Willingness to work shift-based schedules, including non-standard hours.
• Attention to detail and commitment to quality standards.
• Proactive, team-oriented, and comfortable working with a high degree of autonomy.
• Strong problem-solving skills and high self-initiative.

Nice-to-have / Preferred

• ~3 years experience in semiconductor manufacturing, yield engineering, defect reduction, or defect metrology in HVM.
• Experience supporting distance engineering across global sites.
• Demonstrated use of statistical and analytical techniques for yield improvement.
• Experience using Python for data analysis and process modeling.

Education Requirements

Bachelor's degree in Electrical Engineering, Mechanical Engineering, Materials Science, or a related discipline is listed as the minimum qualification. The posting states an ideal ~3 years of semiconductor HVM experience but is open to fresh graduates with strong interest in semiconductor manufacturing.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.