Server IO Specialist, Senior Director of Technology

Job Title

Server IO Specialist, Senior Director of Technology

Role Summary

Lead architecture through commercialization of end-to-end server I/O solutions for datacenter SoCs, including PCIe, CXL, and emerging interfaces. Work with chip architects, IP teams, software and system stakeholders to define I/O requirements, optimize for performance/power/area, and ensure implementation meets specifications.

Experience Level

Senior - experienced individual contributor or technical leader. See Education Requirements for required years of experience tied to degree level (generally 8–10+ years depending on degree).

Responsibilities

Primary responsibilities include defining I/O architecture and collaborating across hardware, software, and system teams.

• Define and document server I/O architecture and requirements for SoC designs.
• Collaborate with IP design, verification, and performance teams to optimize end-to-end I/O for PPA (performance, power, area) trade-offs.
• Work with chip architects to translate high-level concepts into detailed I/O solutions.
• Communicate architecture and design decisions to silicon, system, and software stakeholders.
• Participate in new product development and shape architectural solutions to meet customer technical requirements.
• Support design and verification teams to ensure implementation conforms to specifications.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Must-have: Extensive hands-on experience architecting and designing high-performance server I/O subsystems and coherent I/O solutions.
• Must-have: Deep knowledge of PCIe and CXL protocols and practical experience with high-speed I/O datapaths and transport layers.
• Must-have: Strong understanding of IOMMU/SMMU architecture, coherent and IO-coherent protocol flows, and multiprocessor system architecture including memory and I/O subsystems.
• Must-have: Experience across the end-to-end IO hardware stack (transport to physical layer) and performance microarchitecture of IO datapaths between host and devices.
• Must-have: Proven ability to collaborate with architects, IP teams, verification, firmware, and software teams and to communicate architecture decisions clearly.
• Nice-to-have: Experience with ARM ISA and related specs (SMMU, CHI, GIC); familiarity with accelerator interconnects (UAL, NVLink) and multi-socket links (UPI, C2C, Infinity Fabric).
• Nice-to-have: Experience with confidential compute technologies for I/O interfaces and prior exposure to CXL2.0/CXL3.0 or PCIe Gen5–Gen7 design.

Education Requirements

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 10+ years of relevant engineering experience; OR Master's degree in those fields with 9+ years of relevant experience; OR PhD in those fields with 8+ years of relevant experience. (The posting presents these degree/experience combinations as alternatives.) Preferred: Master's in Computer Science/Engineering, Electrical Engineering, or related field. "Related field" and equivalent experience language are accepted.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.