SerDes Optical System Architect

Job Title

SerDes Optical System Architect

Role Summary

Architect and validate system-level SerDes models and algorithms for NRZ and PAM4 optical links used in PCIe Gen6+ and 200Gbps+ Ethernet applications. Work on modeling, sign-off simulations, silicon correlation, calibration/adaptation algorithms, and customer support within an R&D Silicon IP team.

This role emphasizes practical modeling that predicts lab results, closes the simulation-to-silicon gap, and informs architecture and implementation tradeoffs.

Experience Level

Mid-level. The posting expects advanced technical expertise but does not state a specific years-of-experience requirement.

Responsibilities

Primary responsibilities include building models, running sign-off simulations, developing calibration logic, correlating with silicon, and supporting cross-functional teams and customers.

• Build and maintain SerDes system models in MATLAB and Simulink for NRZ and PAM4 optical links (transmitter, receiver, channel, equalization).
• Run sign-off simulations for PCIe 128Gbps+ and Ethernet 200Gbps+ protocols to verify performance and identify margin risks pre-tapeout.
• Design calibration and adaptation algorithms to tune transceiver performance (balance convergence, stability, and power).
• Correlate simulation results with silicon measurements, iterate models, and document changes and root causes.
• Support customers on system-level performance, optical integration, and link budget analysis for specific channels and modules.
• Collaborate with analog designers, digital/DSP teams, and hardware engineers on implementation tradeoffs, co-simulation, and lab bring-up.
• Review architecture proposals, protocol updates, and design specifications for system-level feasibility and early issue identification.

Requirements

Must-have technical skills and relevant experience. Nice-to-have items follow.

• Expertise in SerDes modeling for optical links and familiarity with optical specifications (e.g., RTLR, LINEAR).
• Proven experience modeling SerDes behavior in MATLAB/Simulink for IMDD optical links and running protocol sign-offs.
• Experience analyzing and closing link budgets for NRZ or PAM4 at 100Gbps+ accounting for transmitter impairments, channel loss, reflections, crosstalk, and receiver noise.
• Hands-on experience with SerDes TX/RX architectures and equalization techniques (FFE, DFE, CTLE), CDR dynamics, and jitter tolerance.
• Ability to correlate models with silicon measurements and debug discrepancies using systematic, physics-based analysis.
• Strong communication skills for cross-functional technical reviews and customer-facing explanations of link budgets and margin risks.
• Nice-to-have: photonics modeling, optical interfacing, lab testing and characterization, and familiarity with C, Verilog-A, or SystemVerilog for co-simulation or prototyping.

Education Requirements

M.Sc. or Ph.D. in Electrical Engineering, Computer Engineering, or a related field with a focus on high-speed communications, analog circuits, or signal processing.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.